PIC16LF819T-I/ML Microchip Technology, PIC16LF819T-I/ML Datasheet - Page 180
![IC MCU FLASH 2KX14 EEPROM 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF819T-I/ML
Manufacturer Part Number
PIC16LF819T-I/ML
Description
IC MCU FLASH 2KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F818-ISO.pdf
(8 pages)
4.PIC16F818-ISO.pdf
(8 pages)
5.PIC18F2450-ISO.pdf
(324 pages)
Specifications of PIC16LF819T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16LF627A-IP PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC18F2450-ISO PDF datasheet #5
- Current page: 180 of 324
- Download datasheet (6Mb)
PIC18F2450/4450
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(V
V
The A/D Converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
FIGURE 16-1:
DS39760D-page 178
REF
DD
+ and RA2/AN2/V
and V
Note 1:
SS
2:
) or the voltage level on the RA3/AN3/
Converter
10-Bit
Channels AN5 through AN7 are not available on 28-pin devices.
I/O pins have diode protection to V
A/D
Reference
Voltage
A/D BLOCK DIAGRAM
REF
- pins.
V
V
REF
REF
+
-
(Input Voltage)
VCFG1:VCFG0
V
AIN
DD
and V
X
X
1
0
0
1
X
X
V
SS
DD
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D Converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE bit (ADCON0 register) is
cleared and A/D Interrupt Flag bit, ADIF, is set. The block
diagram of the A/D module is shown in Figure 16-1.
.
(2)
V
SS
(2)
CHS3:CHS0
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
© 2008 Microchip Technology Inc.
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
(1)
(1)
(1)
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