PIC16LF819T-I/ML Microchip Technology, PIC16LF819T-I/ML Datasheet - Page 66
![IC MCU FLASH 2KX14 EEPROM 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF819T-I/ML
Manufacturer Part Number
PIC16LF819T-I/ML
Description
IC MCU FLASH 2KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F818-ISO.pdf
(8 pages)
4.PIC16F818-ISO.pdf
(8 pages)
5.PIC18F2450-ISO.pdf
(324 pages)
Specifications of PIC16LF819T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16LF627A-IP PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC18F2450-ISO PDF datasheet #5
- Current page: 66 of 324
- Download datasheet (6Mb)
PIC18F2450/4450
TABLE 5-2:
DS39760D-page 64
OSCCON
HLVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
BAUDCON
SPBRGH
SPBRG
RCREG
TXREG
TXSTA
RCSTA
EECON2
EECON1
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
TRISE
TRISD
TRISC
TRISB
TRISA
LATE
LATD
LATC
LATB
LATA
PORTE
PORTD
Legend:
Note
File Name
(3)
(3)
(3)
(3)
(3)
1:
2:
3:
4:
5:
6:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Bit 21 of the TBLPTRU allows access to the device Configuration bits.
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
These registers and/or bits are not implemented on 28-pin devices and are read as ‘0’. Reset values are shown for 40/44-pin devices;
individual unimplemented bits should be interpreted as ‘-’.
RA6 is configured as a port pin based on various primary oscillator modes. When the port pin is disabled, all of the associated bits read ‘0’.
RE3 is only available as a port pin when the MCLRE Configuration bit is clear; otherwise, the bit reads as ‘0’.
RC5 and RC4 are only available as port pins when the USB module is disabled (UCON<3> = 0).
A/D Result Register High Byte
A/D Result Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
EUSART Receive Register
EUSART Transmit Register
Data Memory Control Register 2 (not a physical register)
VDIRMAG
ABDOVF
OSCFIP
OSCFIF
OSCFIE
TRISD7
TRISC7
TRISB7
IDLEN
LATD7
LATC7
LATB7
ADFM
CSRC
SPEN
RD16
IPEN
Bit 7
RD7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F2450/4450) (CONTINUED)
SBOREN
T2OUTPS3
TRISA6
LATA6
TRISD6
TRISC6
TRISB6
T1RUN
RCIDL
LATD6
LATC6
LATB6
CFGS
ADIP
ADIF
ADIE
Bit 6
RX9
RD6
TX9
—
—
—
—
—
—
—
—
—
—
—
—
—
(4)
(4)
(2)
T2OUTPS2
T1CKPS1
TRISD5
TRISB5
TRISA5
VCFG1
ACQT2
DC1B1
IRVST
USBIP
USBIF
USBIE
LATD5
LATB5
SREN
LATA5
CHS3
TXEN
RCIP
RCIF
RCIE
Bit 5
RD5
—
—
—
—
—
—
—
—
—
—
T2OUTPS1
T1CKPS0
HLVDEN
TRISD4
TRISB4
TRISA4
VCFG0
ACQT1
DC1B0
LATD4
LATB4
LATA4
SCKP
SYNC
CREN
CHS2
FREE
TXIP
TXIE
Bit 4
TXIF
RD4
—
—
RI
—
—
—
—
—
—
—
—
T2OUTPS0
T1OSCEN
CCP1M3
WRERR
HLVDL3
SENDB
ADDEN
TRISD3
TRISB3
TRISA3
PCFG3
ACQT0
BRG16
LATD3
LATB3
LATA3
RE3
OSTS
CHS1
Bit 3
RD3
TO
—
—
—
—
—
—
—
—
—
—
—
(5)
TMR2ON
T1SYNC
CCP1M2
HLVDL2
CCP1IP
CCP1IE
HLVDIP
HLVDIF
HLVDIE
CCP1IF
TRISE2
TRISD2
TRISC2
TRISB2
TRISA2
PCFG2
ADCS2
WREN
LATE2
LATD2
LATC2
LATB2
LATA2
RE2
BRGH
CHS0
FERR
Bit 2
RD2
PD
—
—
—
(3)
GO/DONE
T2CKPS1
TMR1CS
CCP1M1
HLVDL1
TMR2IP
TMR2IF
TMR2IE
TRISE1
TRISD1
TRISC1
TRISB1
TRISA1
PCFG1
ADCS1
OERR
LATE1
LATD1
LATC1
LATB1
LATA1
RE1
TRMT
SCS1
WUE
Bit 1
POR
RD1
WR
—
—
—
—
(3)
© 2008 Microchip Technology Inc.
T2CKPS0
SWDTEN
TMR1ON
CCP1M0
HLVDL0
TMR1IP
TMR1IF
TMR1IE
ABDEN
TRISE0
TRISD0
TRISC0
TRISB0
TRISA0
PCFG0
ADCS0
LATE0
LATD0
LATC0
LATB0
LATA0
RE0
ADON
SCS0
TX9D
RX9D
Bit 0
BOR
RD0
—
—
—
—
(3)
0--- q-00
0-00 0101
0q-1 11q0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
xxxx xxxx
--00 0000
--00 qqqq
0-00 0000
xxxx xxxx
xxxx xxxx
--00 0000
01-0 0-00
0000 0000
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
0000 0000
-x-0 x00-
1-1- -1--
0-0- -0--
0-0- -0--
-111 -111
-000 -000
-000 -000
---- -111
1111 1111
11-- -111
1111 1111
-111 1111
---- -xxx
xxxx xxxx
xx-- -xxx
xxxx xxxx
-xxx xxxx
---- x000
xxxx xxxx
POR, BOR
--- ---0
Value on
on Page:
50, 123,
51, 156,
50, 185
50, 204
50, 120
50, 120
50, 122
50, 122
50, 121
50, 184
50, 184
50, 175
50, 176
50, 177
50, 124
50, 124
50, 157
50, 157
50, 165
51, 163
51, 154
51, 155
51, 108
51, 106
51, 103
51, 100
51, 108
51, 106
51, 103
51, 100
51, 109
51, 108
Details
50, 115
51, 110
51, 110
50, 31
50, 42
51, 74
51, 75
51, 95
51, 91
51, 93
51, 94
51, 90
51, 92
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