PIC12CE674-10E/P Microchip Technology, PIC12CE674-10E/P Datasheet - Page 119
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PIC12CE674-10E/P
Manufacturer Part Number
PIC12CE674-10E/P
Description
IC MCU OTP 2KX14 A/D&EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(3 pages)
4.PIC12CE673-10P.pdf
(14 pages)
5.PIC12CE673-10P.pdf
(12 pages)
Specifications of PIC12CE674-10E/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
1
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE674-10E/P
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC12CE674-10E/P
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC16F688T-ISL PDF datasheet
- PIC12CE673-10P PDF datasheet #2
- PIC12CE673-10P PDF datasheet #3
- PIC12CE673-10P PDF datasheet #4
- PIC12CE673-10P PDF datasheet #5
- Current page: 119 of 688
- Download datasheet (3Mb)
7.8
7.9
7.10
1997 Microchip Technology Inc.
Protection Against Spurious Writes
Data EEPROM Operation During Code Protected Configuration
Initialization
There are conditions when the device may not want to write to the data EEPROM memory. To
protect against spurious EEPROM writes, various mechanisms have been built-in. On power-up,
WREN is cleared. Also, the Power-up Timer (72 ms duration) prevents EEPROM write.
The write initiate sequence and the WREN bit together help prevent an accidental write during
brown-outs, power glitches, and software malfunction.
When the device is code protected, the CPU is able to read and write data to the Data EEPROM.
For ROM devices, there are two code protection bits. One for the ROM program memory and one
for the Data EEPROM memory. See the Device Programming Specification for more information
about these bits.
The Data EEPROM module does not have an initialization sequence such as other modules. To
do a read of the Data EEPROM refer to
to
As for the General Purpose RAM, it is a good idea to initialize all Data EEPROM locations to a
known state. This initialization may take place at the time of device programming or an applica-
tion diagnostic mode, since on reset you may not want the Data EEPROM to be cleared.
An Application Diagnostic mode may be a condition on the I/O pins that the device tests for after
the device power-ups. Then depending on this mode, the device would do some diagnostic func-
tion. The state for the I/O pins would need to be something that would not be possible without the
injected levels to force this diagnostic mode.
Example
7-2, and to verify that the write completed successfully refer to
Section 7. Data EEPROM
Example
7-1. To do a write to the Data EEPROM refer
Example
DS31007A-page 7-7
7-3.
7
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