PIC16F627-20E/SS Microchip Technology, PIC16F627-20E/SS Datasheet - Page 81
![IC MCU FLASH 1KX14 20-SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F627-20E/SS
Manufacturer Part Number
PIC16F627-20E/SS
Description
IC MCU FLASH 1KX14 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16F627-20E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
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- Download datasheet (5Mb)
Steps to follow when setting up an Asynchronous
Reception:
1.
2.
3.
4.
5.
6.
7.
8.
9.
TABLE 12-7:
2003 Microchip Technology Inc.
0Ch
18h
1Ah
8Ch
98h
99h
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Reception.
Address
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 12.1).
Enable the asynchronous serial port by clearing
bit SYNC, and setting bit SPEN.
If interrupts are desired, then set enable bit
RCIE.
If 9-bit reception is desired, then set bit RX9.
Enable the reception by setting bit CREN.
Flag bit RCIF will be set when reception is
complete and an interrupt will be generated if
enable bit RCIE was set.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
Read the 8-bit received data by reading the
RCREG register.
If any error occurred, clear the error by clearing
enable bit CREN.
PIR1
RCSTA
RCREG USART Receive Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
Name
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
CSRC
SPEN
EEIE
Bit 7
EEIF
CMIF
CMIE
Bit 6
RX9
TX9
SREN
TXEN
RCIF
RCIE
Bit 5
CREN
SYNC
Bit 4
TXIF
TXIE
Preliminary
ADEN
Bit 3
—
—
—
CCP1IF TMR2IF TMR1IF 0000 -000 0000 -000
CCP1IE TMR2IE TMR1IE 0000 -000 0000 -000
BRGH
FERR
Bit 2
OERR
TRMT
Bit 1
RX9D
TX9D
Bit 0
PIC16F62X
0000 -00x 0000 -00x
0000 0000 0000 0000
0000 -010 0000 -010
0000 0000 0000 0000
Value on
POR
DS40300C-page 79
Value on
RESETS
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