ATTINY84V-10SSU Atmel, ATTINY84V-10SSU Datasheet - Page 83
ATTINY84V-10SSU
Manufacturer Part Number
ATTINY84V-10SSU
Description
MCU AVR 8K ISP FLASH 1.8V 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY84V-10SSU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
14SOIC
Device Core
AVR
Family Name
ATtiny
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.9.2
8006K–AVR–10/10
TCCR0B – Timer/Counter Control Register B
Table 11-8.
Note:
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is
changed according to its COM0B1:0 bits setting. Note that the FOC0B bit is implemented as a
strobe. Therefore it is the value present in the COM0B1:0 bits that determines the effect of the
forced compare.
Bit
0x33 (0x53)
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. MAX
BOTTOM = 0x00
WGM02
Waveform Generation Mode Bit Description
0
0
0
0
1
1
1
1
FOC0A
W
7
0
= 0xFF
WGM01
FOC0B
0
0
1
1
0
0
1
1
W
6
0
WGM00
0
1
0
1
0
1
0
1
R
5
–
0
Timer/Counter
Mode of Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
R
4
–
0
WGM02
R/W
3
0
CS02
R/W
2
0
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
–
–
ATtiny24/44/84
CS01
R/W
1
0
Immediate
Immediate
Update of
BOTTOM
BOTTOM
OCRx at
TOP
TOP
–
–
CS00
R/W
0
0
TOV Flag
BOTTOM
BOTTOM
Set on
TCCR0B
MAX
MAX
MAX
TOP
–
–
(1)
83
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