PIC18F45K20-I/ML Microchip Technology, PIC18F45K20-I/ML Datasheet - Page 14

IC PIC MCU FLASH 16KX16 44QFN

PIC18F45K20-I/ML

Manufacturer Part Number
PIC18F45K20-I/ML
Description
IC PIC MCU FLASH 16KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/ML

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PICkit™ 3 Debug Express
DS41370C-page 10
2.2.1
Data memory is called “file register” memory in the PIC18XXXX family. It consists of up
to 4096 bytes of 8-bit RAM. Upon power-up, the values in data memory are random.
Data is organized in banks of 256 bytes, requiring that a bank (the upper 4 bits of the
register address) be selected with the Bank Select Register (BSR). Special areas in
Bank 0 and in Bank 15 can be accessed directly without concern for banking. These
special data areas are called Access RAM. The high Access RAM area is where most
of the Special Function Registers are located.
When using MPLAB C Compiler, this banking is usually transparent, but the use of the
#pragma varlocate directive tells the compiler where variables are stored, resulting
in more efficient code.
Uninitialized data memory variables, arrays and structures are usually stored in
memory with the section attribute, udata. Initialized data can be defined in MPLAB C
Compiler so that variables will have correct values when the compiler initialization
executes. This means that the values are stored in program memory, then moved to
data memory on start-up. Depending upon how much initialized memory is required for
the application, the use of initialized data (rather than simply setting the data values at
run time) may adversely affect the efficient use of program memory. Since file registers
are 8 bits, when using variables consideration should be made on what is the best
datatype to define them as. For example, when a variable value is not expected to
exceed 255, defining it as a char instead of an int will result in smaller, faster code.
2.2.2
Special Function Registers (SFRs) are CPU core registers (such as the Stack Pointer,
STATUS register and Program Counter) and include the registers for the peripheral
modules on the microprocessor. The peripherals include such things as input and
output pins, timers, USARTs and registers to read and write the EEDATA areas of the
device. MPLAB C Compiler can access these registers by name, and they can be read
and written like a variable defined in the application. Use caution, though, because
some of the Special Function Registers have characteristics different from variables.
Some have only certain bits available, some are read-only and some may affect other
registers or device operation when accessed. These registers are mapped to
addresses in Bank 15 of the data memory.
2.2.3
CALL and RETURN instructions push and pop the Program Counter on the return
address stack. The return stack is a separate area of memory, allowing 31 levels of
subroutines.
The CALL/RETURN stack is distinct from the software stack maintained by MPLAB C
Compiler. The software stack is used for automatic parameters and local variables and
resides in file register memory as defined in the Linker Script.
Data Memory
Special Function Registers
Return Address Stack
© 2009 Microchip Technology Inc.

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