PIC18F45K20-I/ML Microchip Technology, PIC18F45K20-I/ML Datasheet - Page 56

• Manufacturer Part Number: PIC18F45K20-I/ML
• Description: IC PIC MCU FLASH 16KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-QFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Package: 44QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PICkit™ 3 Debug Express
FIGURE 3-43:
DS41370C-page 52
void
{
//
INTCON2bits.INTEDG0
INTCONbits.INT0IF
INTCONbits.INT0IE
//
//
RCONbits.IPEN
INTCONbits.GIEL
INTCONbits.GIEH
//
INTCONbits.TMR0IF
INTCON2bits.TMR0IP
INTCONbits.TMR0IE
Timer0_Init(void)
Set
NOTE:
Set
Set
up
up
up
INT0
switch
global
Interrupts
=
associated interrupt enable bits are in the PIEx registers, and the IPRx register bits set
the interrupt priority as low or high. For detailed information the bits in these registers,
see Section 9.0 “Interrupts” of the PIC18F45K20 Data Sheet (DS41303).
LESSON 8 INTERRUPT INITIALIZATIONS
An interrupt is desired when the Demo Board button is pressed. Therefore, the
program utilizes the INT0 functionality of the RB0 pin to use it as an external interrupt
input pin. The interrupt is edge triggered, and we want it to interrupt on the falling edge
so the initial switch press is detected. The edge direction is set with
INTCON2bits.INTEDG0. INT0 is always a high priority interrupt. The flag INT0IF in
INTCON is cleared before enabling the interrupt with INT0IE. Switch debouncing is
ignored for the sake of simplicity here, but would be recommended in a product
application.
The interrupt configuration for Timer0 has been added to the Timer0_Init()
function. First, we make sure the flag TMR0IF is cleared, set the priority to low (0) with
TMR0IP, and then enable the interrupt with TMR0IE.
Enabling the individual interrupts has no effect until interrupts are enabled at the global
level. First, the IPEN bit in RCON is used to enable or disable priority interrupts. In
Lesson 8 it is set to enable priority interrupts. Low priority interrupts are enabled with
GIEL, and microcontroller interrupting is enabled with GIEH. Note that high and low
priority interrupts aren’t individually enabled with the two bits, as GIEH shuts off both
when it is off:
In this way, all interrupts may be disabled with a single bit, GIEH in INTCON.
is
=
=
1;
=
interrupt
=
ALWAYS
interrupts
0;
0;
=
=
1;
1;
=
=
for
INTCONbits.GIEH INTCONbits.GIEL Interrupt Functions
0;
1;
0;
1;
a
timer
on
high
0
0
1
1
INT0
// interrupt
// ensure
// enable
// Enable
// Low
// Interrupting
priority
//
//
//
clear
Timer0
enable
priority
flag
INT0
priority
interrupt
on
roll-over
is
the
is
interrupt
enabled.
falling
interrupts
low
0
1
0
1
Timer0
cleared
levels
priority
interrupt
edge
interrupt.
on
allowed
No Interrupts; all interrupts disabled.
No Interrupts; all interrupts disabled.
High priority interrupts only enabled.
Both priority level interrupts enabled
of
interrupts
interrupt
flag
INT0
© 2009 Microchip Technology Inc.
(switch
pressed)