PIC16F72-I/SS Microchip Technology, PIC16F72-I/SS Datasheet - Page 130

• Manufacturer Part Number: PIC16F72-I/SS
• Description: IC PIC MCU FLASH 2KX14 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F72-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/SPI/SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 8-bit
• Controller Family/series: PIC16F
• No. Of I/o's: 22
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F72
Registers ............................................................................. 36
RESET .......................................................................... 59, 62
Revision History ................................................................ 123
RP0, RP1 bit ......................................................................... 7
S
S.......................................................................................... 44
Sales and Support............................................................. 133
Slave Mode
SLEEP..................................................................... 59, 62, 71
SMP .................................................................................... 44
Software Simulator (MPLAB SIM)....................................... 82
Special Event Trigger.......................................................... 57
Special Features of the CPU............................................... 59
Special Function Registers
SPI
SPI Clock Edge Select bit, CKE.......................................... 44
SPI Data Input Sample Phase Select bit, SMP................... 44
SPI Mode
SSP
DS39597C-page 128
ADCON0 (A/D Control 0) ............................................ 53
ADCON1 (A/D Control 1) ............................................ 54
CCPCON1 (Capture/Compare/PWM Control 1) ......... 37
Initialization Conditions (table) .................................... 66
INTCON (Interrupt Control) ......................................... 14
OPTION ...................................................................... 13
PCON (Power Control) ............................................... 17
PIE1 (Peripheral Interrupt Enable 1) ........................... 15
PIR1 (Peripheral Interrupt Flag 1) ............................... 16
PMCON1 (Program Memory Control 1) ...................... 27
SSPCON (Sync Serial Port Control) ........................... 45
SSPSTAT (Synchronous Serial Port Status) ............... 44
STATUS ...................................................................... 12
Summary....................................................................... 9
T1CON (Timer1 Control) ............................................. 31
Brown-out Reset (BOR). See Brown-out Reset (BOR)
MCLR RESET. See MCLR
Power-on Reset (POR). See Power-on Reset (POR)
RESET Conditions for All Registers............................ 66
RESET Conditions for PCON Register ....................... 65
RESET Conditions for Program Counter .................... 65
RESET Conditions for STATUS Register .................... 65
WDT Reset. See Watchdog Timer (WDT)
SCL ............................................................................. 48
SDA............................................................................. 48
PMADRH .................................................................... 27
PMADRL ..................................................................... 27
PMCON1..................................................................... 27
PMDATH ..................................................................... 27
PMDATL...................................................................... 27
Associated Registers .................................................. 46
Serial Clock ................................................................. 43
Serial Data In .............................................................. 43
Serial Data Out............................................................ 43
Slave Select ................................................................ 43
ACK............................................................................. 48
Addressing .................................................................. 48
BF bit........................................................................... 48
I
R/W bit ........................................................................ 49
Reception .................................................................... 49
SCL Clock Input .......................................................... 48
SSPOV bit ................................................................... 48
Transmission............................................................... 49
2
C Mode Operation .................................................... 48
SSPADD Register............................................................... 10
SSPEN................................................................................ 45
SSPIF ................................................................................. 16
SSPM3:SSPM0 .................................................................. 45
SSPOV ............................................................................... 45
SSPSTAT Register ............................................................. 10
Stack................................................................................... 19
START bit, S....................................................................... 44
STATUS Register
STOP bit, P......................................................................... 44
Synchronous Serial Port (SSP) .......................................... 43
Synchronous Serial Port Enable bit, SSPEN...................... 45
Synchronous Serial Port Interrupt....................................... 16
Synchronous Serial Port Mode Select bits,
T
T2CKPS0 bit ....................................................................... 36
T2CKPS1 bit ....................................................................... 36
T2CON (Timer2 Control) .................................................... 36
T
Timer0................................................................................. 29
Timer1
Timer2................................................................................. 35
AD
...................................................................................... 56
SSPM3:SSPM0 ............................................................ 45
Overflows.................................................................... 19
Underflow ................................................................... 19
DC bit.......................................................................... 12
IRP bit ......................................................................... 12
PD bit .......................................................................... 62
TO bit .................................................................... 12, 62
Overview..................................................................... 43
SPI Mode .................................................................... 43
Clock Source Edge Select (T0SE bit)......................... 13
Clock Source Select (T0CS bit) .................................. 13
External Clock............................................................. 30
Interrupt ...................................................................... 29
Operation .................................................................... 29
Overflow Enable (TMR0IE bit) .................................... 14
Overflow Flag (TMR0IF bit) ........................................ 69
Overflow Interrupt ....................................................... 69
Prescaler .................................................................... 30
T0CKI ......................................................................... 30
Associated Registers .................................................. 34
Asynchronous Counter Mode ..................................... 33
Capacitor Selection..................................................... 33
Counter Operation ...................................................... 32
Interrupt ...................................................................... 33
Operation in Timer Mode ............................................ 32
Oscillator..................................................................... 33
Prescaler .................................................................... 34
Resetting TMR1H, TMR1L Register Pair.................... 34
Resetting Using a CCP Trigger Output....................... 33
Synchronized Counter Mode ...................................... 32
Interrupt ...................................................................... 35
Operation .................................................................... 35
Output ......................................................................... 35
Prescaler, Postscaler .................................................. 35
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