PIC16C782-I/P Microchip Technology, PIC16C782-I/P Datasheet - Page 18
PIC16C782-I/P
Manufacturer Part Number
PIC16C782-I/P
Description
IC MCU CMOS 8BIT 2K 20MHZ 20-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C781-ISO.pdf
(186 pages)
2.PIC16C781-ISO.pdf
(8 pages)
3.PIC16C781-ISO.pdf
(8 pages)
Specifications of PIC16C782-I/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 1x8b
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
2
No. Of
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XP202 - ADAPTER DEVICE PIC16C781/782DM163012 - BOARD DEMO PICDEM FOR 16C781/782AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16C782I/P
- Current page: 18 of 186
- Download datasheet (4Mb)
PIC16C781/782
TABLE 2-1:
DS41171A-page 16
Bank 3
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch
18Dh
18Eh
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh
19Ch
19Dh
19Eh
19Fh
Legend:
Note
Address
(2)
(2)
(2)
(2)
(1,2)
(2)
1:
2:
INDF
OPTION_REG
PCL
STATUS
FSR
TRISB
PCLATH
INTCON
PMCON1
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0'.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents are trans-
ferred to the upper byte of the program counter. See Section 2.9 for more detail.
These registers can be addressed from any bank.
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PIC16C781/782 SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
PORTB Data Direction Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Reserved
RBPU
Bit 7
GIE
IRP
—
INTEDG
PEIE
Bit 6
RP1
—
—
T0CS
Bit 5
RP0
T0IE
—
—
Write Buffer for the upper 5 bits of the Program Counter
T0SE
Preliminary
Bit 4
INTE
TO
—
RBIE
Bit 3
PSA
PD
—
Bit 2
T0IF
PS2
—
Z
Bit 1
INTF
PS1
DC
—
2001 Microchip Technology Inc.
Bit 0
RBIF
PS0
RD
C
0000 0000
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
1111 1111
---0 0000
0000 000x
1--- ---0
POR, BOR
Value on:
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