PIC16C782-I/P Microchip Technology, PIC16C782-I/P Datasheet - Page 67
![IC MCU CMOS 8BIT 2K 20MHZ 20-DIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC16C782-I/P
Manufacturer Part Number
PIC16C782-I/P
Description
IC MCU CMOS 8BIT 2K 20MHZ 20-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C781-ISO.pdf
(186 pages)
2.PIC16C781-ISO.pdf
(8 pages)
3.PIC16C781-ISO.pdf
(8 pages)
Specifications of PIC16C782-I/P
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 1x8b
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
2
No. Of
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16XP202 - ADAPTER DEVICE PIC16C781/782DM163012 - BOARD DEMO PICDEM FOR 16C781/782AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16C782I/P
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If another module has enabled the bandgap, then the
reference will be stable when the PLVD module is
enabled and the BGST flag can be ignored. However,
if the bandgap has not been previously enabled, the
LVDIF bit will not be valid until the BGST bit is set (see
Figure 8-3). Systems using the PLVD interrupt should
not enable the interrupt until after the reference is sta-
ble to prevent spurious interrupts.
8.2.1
The following steps are needed to set up the PLVD
Module:
1.
FIGURE 8-3:
Internally Generated
Reference Stable
Internally Generated
Reference Stable
2001 Microchip Technology Inc.
CASE 1:
CASE 2:
Write the value to the LV3:LV0 bits (LVDCON
register), which selects the desired PLVD Trip
Point.
Enable LVD
Enable LVD
LVDIF
LVDIF
V
V
SETTING UP THE PLVD MODULE
DD
DD
LOW VOLTAGE DETECT WAVEFORMS
LVDIF may not be set
Preliminary
but remains set as LVD condition
still exists
Attempt to clear LVDIF in software
2.
3.
4.
5.
6.
Ensure that PLVD interrupts are disabled (the
LVDIE bit is cleared, or the GIE bit is cleared).
Enable the PLVD module (set the LVDEN bit in
the LVDCON register).
Wait for the PLVD module to stabilize (the BGST
bit to become set).
Clear the PLVD interrupt flag, which may have
falsely become set until the PLVD module has
stabilized (clear the LVDIF bit).
Enable the PLVD interrupt (set the LVDIE and
the GIE bits).
LVDIF cleared in software
PIC16C781/782
LVDIF cleared in software
VLVD
.
VLVD
DS41171A-page 65
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