PIC16LF1947-I/PT Microchip Technology, PIC16LF1947-I/PT Datasheet - Page 187

• Manufacturer Part Number: PIC16LF1947-I/PT
• Description: IC MCU 8BIT FLASH 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1947-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 28KB (16K x 14)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Eeprom Size: 256 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: EUSART/I2C/SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 17-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 17
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

19.0
The module consists of a single SR Latch with multiple
Set and Reset inputs as well as separate latch outputs.
The SR Latch module includes the following features:
• Programmable input selection
• SR Latch output is available externally
• Separate Q and Q outputs
• Firmware Set and Reset
The SR Latch can be used in a variety of analog appli-
cations, including oscillator circuits, one-shot circuit,
hysteretic controllers, and analog timing applications.
19.1
The latch is a Set-Reset Latch that does not depend on
a clock source. Each of the Set and Reset inputs are
active-high. The latch can be Set or Reset by:
• Software control (SRPS and SRPR bits)
• Comparator C1 output (SYNCC1OUT)
• Comparator C2 output (SYNCC2OUT)
• SRI pin
• Programmable clock (SRCLK)
The SRPS and the SRPR bits of the SRCON0 register
may be used to Set or Reset the SR Latch, respec-
tively. The latch is Reset-dominant. Therefore, if both
Set and Reset inputs are high, the latch will go to the
Reset state. Both the SRPS and SRPR bits are self
resetting which means that a single write to either of the
bits is all that is necessary to complete a latch Set or
Reset operation.
The output from Comparator C1 or C2 can be used as
the Set or Reset inputs of the SR Latch. The output of
either Comparator can be synchronized to the Timer1
clock source. See
ule”
Control”
An external source on the SRI pin can be used as the
Set or Reset inputs of the SR Latch.
An internal clock source is available that can periodically
set or reset the SR Latch. The SRCLK<2:0> bits in the
SRCON0 register are used to select the clock source
period. The SRSCKE and SRRCKE bits of the SRCON1
register enable the clock source to Set or Reset the SR
Latch, respectively.
 2010 Microchip Technology Inc.
Note:
and
SR LATCH
Latch Operation
for more information.
Section 21.0 “Timer1 Module with Gate
Enabling both the Set and Reset inputs
from any one source at the same time
may result in indeterminate operation, as
the Reset dominance cannot be assured.
Section 18.0 “Comparator Mod-
Preliminary
19.2
The SRQEN and SRNQEN bits of the SRCON0 regis-
ter control the Q and Q latch outputs. Both of the SR
Latch outputs may be directly output to an I/O pin at the
same time.
The applicable TRIS bit of the corresponding port must
be cleared to enable the port pin output driver.
19.3
Upon any device Reset, the SR Latch output is not ini-
tialized to a known state. The user’s firmware is
responsible for initializing the latch output before
enabling the output pins.
PIC16F/LF1946/47
Latch Output
Effects of a Reset
DS41414B-page 187