PIC18F45K22-I/PT Microchip Technology, PIC18F45K22-I/PT Datasheet - Page 129

MCU 8BIT 32KB FLASH 5.5V 44TQFP

PIC18F45K22-I/PT

Manufacturer Part Number
PIC18F45K22-I/PT
Description
MCU 8BIT 32KB FLASH 5.5V 44TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K22-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP
Processor Series
PIC18F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F45K22-I/PT
Manufacturer:
SST
Quantity:
3 400
Part Number:
PIC18F45K22-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F45K22-I/PT
Manufacturer:
MIC
Quantity:
20 000
Part Number:
PIC18F45K22-I/PT
0
Company:
Part Number:
PIC18F45K22-I/PT
Quantity:
20 400
REGISTER 9-16:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSP2IP
R/W-0
SSP2IP: Synchronous Serial Port 2 Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP: Bus Collision 2 Interrupt Priority bit
1 = High priority
0 = Low priority
RC2IP: EUSART2 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX2IP: EUSART2 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
CTMUIP: CTMU Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5GIP: TMR5 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3GIP: TMR3 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1GIP: TMR1 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP
R/W-0
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
W = Writable bit
‘1’ = Bit is set
RC2IP
R/W-0
R/W-0
TX2IP
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CTMUIP
R/W-0
PIC18(L)F2X/4XK22
TMR5GIP
R/W-0
x = Bit is unknown
TMR3GIP
R/W-0
DS41412D-page 129
TMR1GIP
R/W-0
bit 0

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