PIC16F88-E/P Microchip Technology, PIC16F88-E/P Datasheet - Page 42

• Manufacturer Part Number: PIC16F88-E/P
• Description: IC MCU FLASH 4KX14 EEPROM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F88-E/P

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0202 - ADAPTER MPLABICE 18P 300 MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F87/88
4.6.3
When clock switching is performed, the Watchdog
Timer is disabled because the Watchdog ripple counter
is used as the Oscillator Start-up Timer.
REGISTER 4-2:
DS30487C-page 40
Note:
CLOCK TRANSITION AND WDT
The OST is only used when switching to
XT, HS and LP Oscillator modes.
bit 7
bit 6-4
bit 3
bit 2
bit 1-0
OSCCON: OSCILLATOR CONTROL REGISTER (ADDRESS 8Fh)
Unimplemented: Read as ‘0’
IRCF<2:0>: Internal RC Oscillator Frequency Select bits
000 = 31.25 kHz
001 = 125 kHz
010 = 250 kHz
011 = 500 kHz
100 = 1 MHz
101 = 2 MHz
110 = 4 MHz
111 = 8 MHz
OSTS: Oscillator Start-up Time-out Status bit
1 = Device is running from the primary system clock
0 = Device is running from T1OSC or INTRC as a secondary system clock
IOFS: INTOSC Frequency Stable bit
1 = Frequency is stable
0 = Frequency is not stable
SCS<1:0>: Oscillator Mode Select bits
00 = Oscillator mode defined by FOSC<2:0>
01 = T1OSC is used for system clock
10 = Internal RC is used for system clock
11 = Reserved
bit 7
Legend:
R = Readable bit
-n = Value at POR
Note 1: Bit resets to ‘0’ with Two-Speed Start-up mode and LP, XT or HS selected as the
U-0
—
oscillator mode.
IRCF2
R/W-0
R/W-0
IRCF1
W = Writable bit
‘1’ = Bit is set
R/W-0
IRCF0
Once the clock transition is complete (i.e., new oscilla-
tor selection switch has occurred), the Watchdog
counter is re-enabled with the counter reset. This
allows the user to synchronize the Watchdog Timer to
the start of execution at the new clock frequency.
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OSTS
R-0
(1)
R/W-0
IOFS
 2005 Microchip Technology Inc.
x = Bit is unknown
R/W-0
SCS1
R/W-0
SCS0
bit 0