ATMEGA165PV-8AUR Atmel, ATMEGA165PV-8AUR Datasheet - Page 55
ATMEGA165PV-8AUR
Manufacturer Part Number
ATMEGA165PV-8AUR
Description
MCU AVR 16KB FLASH 8MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165PV-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.2
8019K–AVR–11/10
Moving Interrupts Between Application and Boot Space
The General Interrupt Control Register controls the placement of the Interrupt Vector table, see
“MCUCR – MCU Control Register” on page
To avoid unintentional changes of Interrupt Vector tables, a special write procedure must be fol-
lowed to change the IVSEL bit:
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status
Register is unaffected by the automatic disabling.
Note:
The following example shows how interrupts are moved.
0x1C31
0x1C32
0x1C33
a. Write the Interrupt Vector Change Enable (IVCE) bit to one.
b. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while
executing from the Boot Loader section. Refer to the section
Write Self-Programming” on page 250
out
sei
<instr>
SPL,r16
xxx
for details on Boot Lock bits.
56.
; Enable interrupts
“Boot Loader Support – Read-While-
ATmega165P
55
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