PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 377

• Manufacturer Part Number: PIC18F65J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 25-11:
TABLE 25-16: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
© 2007 Microchip Technology Inc.
70
70A
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1:
Param
No.
Note:
SS
SCK
(CKP = 0)
SCK
(CKP = 1)
SDO
SDI
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SC
SC
Symbol
DI
DI
B
DO
DO
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
2
V2
V2
H2
L2
H2
L2
L2
L2
L2WB SS to write to SSPBUF
H
L
H2
L2
H2
R
F
B
R
F
Refer to Figure 25-3 for load conditions.
DO
SS
SC
SC
SC
SC
DI
DO
SS
DI
DO
L
L,
H
H,
L
H,
L
V
H,
V,
Z SS
SS
SCK Input High Time
(Slave mode)
SCK Input Low Time
(Slave mode)
Setup Time of SDI Data Input to SCK Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time (Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK Edge
SS
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
to SCK
to SDO Output High-impedance
after SCK Edge
80
71
73
or SCK
MSb In
MSb
Characteristic
74
72
Input
75, 76
Preliminary
bit 6 - - - - - - 1
bit 6 - - - - 1
Continuous
Single Byte
Continuous
Single Byte
PIC18F85J90 FAMILY
78
79
1.25 T
1.25 T
1.5 T
79
78
LSb In
3 T
3 T
Min
100
100
LSb
CY
10
CY
40
40
—
—
—
—
—
CY
CY
83
CY
CY
+ 40
+ 40
+ 30
+ 30
77
Max Units Conditions
25
25
50
25
25
50
—
—
—
—
—
—
—
—
—
—
DS39770B-page 375
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)