ATMEGA162-16AUR Atmel, ATMEGA162-16AUR Datasheet - Page 43
![MCU AVR 16KB FLASH 16MHZ 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA162-16AUR
Manufacturer Part Number
ATMEGA162-16AUR
Description
MCU AVR 16KB FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA162-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Power
Management
and Sleep
Modes
MCU Control Register
– MCUCR
MCU Control and
Status Register –
MCUCSR
2513K–AVR–07/09
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM2 bit in MCUCSR, the SM1 bit in MCUCR, and the
SM0 bit in the EMCUCR Register select which sleep mode (Idle, Power-down, Power-save,
Standby, or Extended Standby) will be activated by the SLEEP instruction. See
summary. If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up.
The MCU is then halted for four cycles in addition to the start-up time, executes the interrupt rou-
tine, and resumes execution from the instruction following SLEEP. The contents of the Register
File and SRAM are unaltered when the device wakes up from sleep. If a Reset occurs during
sleep mode, the MCU wakes up and executes from the Reset Vector.
Figure 18 on page 35
tion. The figure is helpful in selecting an appropriate sleep mode.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bit 4 – SM1: Sleep Mode Select Bit 1
The Sleep Mode Select bits select between the five available sleep modes as shown in
16.
• Bit 5 – SM2: Sleep Mode Select Bit 2
The Sleep Mode Select bits select between the five available sleep modes as shown in
16.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
SRE
R/W
JTD
R/W
7
0
7
0
SRW10
presents the different clock systems in the ATmega162, and their distribu-
R/W
R/W
6
0
6
–
0
SM2
R/W
R/W
SE
5
0
5
0
JTRF
SM1
R/W
R/W
4
0
4
0
WDRF
ISC11
R/W
R/W
3
0
3
0
BORF
ISC10
R/W
R/W
2
0
2
0
EXTRF
ISC01
R/W
R/W
1
0
1
0
ATmega162/V
ISC00
PORF
R/W
R/W
0
0
0
0
MCUCSR
MCUCR
Table 16
Table
Table
for a
43
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