DSPIC30F2011-30I/SO Microchip Technology, DSPIC30F2011-30I/SO Datasheet - Page 74

• Manufacturer Part Number: DSPIC30F2011-30I/SO
• Description: IC DSPIC MCU/DSP 12K 18SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2011-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 12
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 18SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 12
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F201130ISO

dsPIC30F2011/2012/3012/3013
9.1
The 16-bit timer can be placed in the Gated Time
Accumulation mode. This mode allows the internal T
to increment the respective timer when the gate input
signal (T1CK pin) is asserted high. Control bit,
TGATE (T1CON<6>), must be set to enable this mode.
The timer must be enabled (TON = 1) and the timer
clock source set to internal (TCS = 0).
When the CPU goes into Idle mode, the timer stops
incrementing unless TSIDL = 0. If TSIDL = 1, the timer
resumes the incrementing sequence upon termination
of the CPU Idle mode.
9.2
The input clock (F
Timer has a prescale option of 1:1, 1:8, 1:64 and 1:256,
selected by control bits, TCKPS<1:0> (T1CON<5:4>).
The prescaler counter is cleared when any of the
following occurs:
• a write to the TMR1 register
• a write to the T1CON register
• device Reset, such as POR and BOR
However, if the timer is disabled (TON = 0), then the
timer prescaler cannot be reset since the prescaler
clock is halted.
TMR1 is not cleared when T1CON is written. It is
cleared by writing to the TMR1 register.
9.3
The timer operates during CPU Sleep mode, if:
• The timer module is enabled (TON = 1), and
• The timer clock source is selected as external
• The TSYNC bit (T1CON<2>) is asserted to a logic
When all three conditions are true, the timer continues
to count up to the Period register and be reset to
0x0000.
When a match between the timer and the Period
register occurs, an interrupt can be generated if the
respective timer interrupt enable bit is asserted.
DS70139F-page 74
(TCS = 1), and
‘0’ which defines the external clock source as
asynchronous.
Timer Gate Operation
Timer Prescaler
Timer Operation During Sleep
Mode
OSC
/4 or external clock) to the 16-bit
CY
controller.
9.4
The 16-bit timer has the ability to generate an
interrupt-on-period match. When the timer count
matches the Period register, the T1IF bit is asserted and
an interrupt is generated, if enabled. The T1IF bit must be
cleared in software. The timer interrupt flag, T1IF, is
located in the IFS0 Control register in the interrupt
When the Gated Time Accumulation mode is enabled,
an interrupt is also generated on the falling edge of the
gate signal (at the end of the accumulation cycle).
Enabling an interrupt is accomplished via the
respective timer interrupt enable bit, T1IE. The timer
interrupt enable bit is located in the IEC0 Control
register in the interrupt controller.
9.5
Timer1, when operating in Real-Time Clock (RTC)
mode, provides time of day and event time-stamping
capabilities. Key operational features of the RTC are:
• Operation from 32 kHz LP oscillator
• 8-bit prescaler
• Low power
• Real-Time Clock interrupts
These operating modes are determined by setting the
appropriate bit(s) in the T1CON Control register.
FIGURE 9-2:
C1 = C2 = 18 pF; R = 100K
C1
C2
Timer Interrupt
Real-Time Clock
32.768 kHz
XTAL
R
RECOMMENDED
COMPONENTS FOR
TIMER1 LP OSCILLATOR
RTC
© 2008 Microchip Technology Inc.
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