PIC18F2331-E/SP Microchip Technology, PIC18F2331-E/SP Datasheet - Page 238
![IC MCU FLASH 4KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2331-E/SP
Manufacturer Part Number
PIC18F2331-E/SP
Description
IC MCU FLASH 4KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18F4331-EP.pdf
(400 pages)
Specifications of PIC18F2331-E/SP
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18F4331-EP PDF datasheet #7
- Current page: 238 of 400
- Download datasheet (7Mb)
PIC18F2331/2431/4331/4431
To set up an Asynchronous Transmission:
1.
2.
3.
4.
FIGURE 19-6:
TABLE 19-6:
DS39616C-page 236
INTCON
PIR1
PIE1
IPR1
RCSTA
RCREG
TXSTA
BAUDCTL
SPBRGH
SPBRG
Legend:
Name
Initialize the SPBRG register for the appropriate
baud rate. If a high-speed baud rate is desired,
set bit, BRGH (see Section 19.2 “EUSART
Baud Rate Generator (BRG)”).
Enable the asynchronous serial port by clearing
bit, SYNC, and setting bit, SPEN.
If interrupts are desired, set enable bit, TXIE.
If 9-bit transmission is desired, set transmit bit,
TX9. Can be used as address/data bit.
Note:
RX (Pin)
Rcv Shift
Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
x = unknown, - = unimplemented, read as ‘0’. Shaded cells are not used for asynchronous reception.
EUSART Receive Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH
CSRC
SPEN
This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after
the third word, causing the OERR (Overrun) bit to be set.
Bit 7
—
—
—
—
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Start
ASYNCHRONOUS RECEPTION
bit
PEIE/GIEL
RCIDL
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
bit 0
bit 1
TMR0IE
SREN
TXEN
RCIF
RCIE
RCIP
Bit 5
—
bit 7/8
INT0IE
CREN
SYNC
SCKP
Bit 4
TXIF
TXIE
TXIP
Stop
Preliminary
bit
ADDEN
SENDB
BRG16
Word 1
RCREG
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
Start
bit
bit 0
TMR0IF
CCP1IF TMR2IF
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
5.
6.
7.
If using interrupts, ensure that the GIE and PEIE bits in
the INTCON register (INTCON<7:6>) are set.
BRGH
FERR
Bit 2
—
Enable the transmission by setting bit, TXEN,
which will also set bit, TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit, TX9D.
Load data to the TXREG register (starts
transmission).
INT0IF
OERR
TRMT
WUE
bit 7/8
Bit 1
Word 2
RCREG
Stop
bit
TMR1IF
ABDEN
RX9D
TX9D
Bit 0
RBIF
Start
bit
© 2007 Microchip Technology Inc.
0000 000x
-000 0000
-000 0000
-111 1111
0000 000x
0000 0000
0000 0010
-1-1 0-00
0000 0000
0000 0000
POR, BOR
Value on
bit 7/8
Stop
0000 000u
-000 0000
-000 0000
-111 1111
0000 000x
0000 0000
0000 0010
-1-1 0-00
0000 0000
0000 0000
bit
Value on
all other
Resets
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