PIC18F85J90-I/PT Microchip Technology, PIC18F85J90-I/PT Datasheet - Page 7

• Manufacturer Part Number: PIC18F85J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F85J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 67
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2. Module: Electrical Characteristics
Changes, shown in bold, have been made to the D005
row in
TABLE 26.1
3. Module: I/O Ports
10.1.1
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Most pins that
are used as digital only inputs are able to handle DC
voltages up to 5.5V, a level typical for digital logic cir-
cuits. The digital pins that cannot exceed V
RE1, RE2, RG0, RG2 and RG3.
In contrast, pins that also have analog input functions
of any kind can only tolerate voltages up to V
these pins, voltage excursions beyond V
avoided.
Table 10-1
The changes are shown in bold. Refer to Section 26.0
“Electrical Characteristics” for more details.
 2010 Microchip Technology Inc.
PIC18F85J90 Family
(Industrial)
D001
D001B V
D001C AV
D001D AV
D002
D003
D004
D005
Note 1:
Param
No.
In Section 10.1 “I/O Port Pin Capabilities”, the
following changes are made.
Table
2:
V
V
V
S
V
Symbol
DD
DDCORE
DR
POR
VDD
BOR
This is the limit to which V
RAM data.
Device will operate normally until Brown-out Reset occurs, even though V
summarizes the input voltage capabilities.
DD
SS
INPUT PINS AND VOLTAGE
CONSIDERATIONS
26.1. The updated table is shown below:
(2)
DC Characteristics: Supply Voltage PIC18F85J90 Family (Industrial)
Supply Voltage
External Supply for
Microcontroller Core
Analog Supply Voltage
Analog Ground Potential V
RAM Data Retention
Voltage
V
Ensure Internal Power-
on Reset Signal
V
to Ensure Internal
Power-on Reset Signal
Brown-out Reset Voltage
DD
DD
Start Voltage to
Rise Rate
Characteristic
(1)
DDCORE
DD
DD
should be
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C < T
V
are RE0,
V
can be lowered in Sleep mode, or during a device Reset, without losing
DD
SS
DDCORE
DD
0.05
1.92
Min
2.0
2.0
1.5
—
. On
– 0.3
– 0.3
Typ
2.0
—
—
—
—
—
—
—
—
PIC18F85J90 FAMILY
TABLE 10-1:
PORTA<7:0>
PORTC<1:0>
PORTE<1:0>
PORTF<7:1>
PORTG<3:2,0>
PORTB<7:0>
PORTC<7:2>
PORTD<7:0>
PORTE<7:3>
PORTG<4,1>
PORTH<7:0>
PORTJ<7:0>
Note 1:
V
Port or Pin
V
DD
SS
2.70
Max
3.6
3.6
0.7
2.2
—
—
+ 0.3
+ 0.3
Not available on 64-pin devices.
(1)
(1)
A
Units
V/ms See Section 5.3 “Power-on
< +85°C for Industrial
V
V
V
V
V
V
V
V
INPUT VOLTAGE TOLERANCE
Tolerated
Input
ENVREG tied to Vss
ENVREG tied to V
ENVREG tied to Vss
See Section 5.3 “Power-on
Reset (POR)” for details
Reset (POR)” for details
5.5V
V
DD
DD
may be below V
Only V
are tolerated.
Tolerates input levels
above V
most standard logic.
Conditions
Description
DD
DS80488B-page 7
DD
DD
input levels
; useful for
DDMIN
.