DSPIC33FJ12MC202-I/SP Microchip Technology, DSPIC33FJ12MC202-I/SP Datasheet - Page 29
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DSPIC33FJ12MC202-I/SP
Manufacturer Part Number
DSPIC33FJ12MC202-I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
4.2.12
The QBLANK command queries the programming
executive to determine if the contents of code memory
are blank (contains all ‘1’s). The size of code memory
to check must be specified in the command.
The Blank Check for code memory begins at [Addr] and
advances toward larger addresses for the specified
number of instruction words.
QBLANK returns a QE_Code of 0xF0 if the specified
code memory is blank; otherwise, QBLANK returns a
QE_Code of 0x0F.
Expected Response (2 words for blank device):
0x1EF0
0x0002
Expected Response (2 words for non-blank device):
0x1E0F
0x0002
© 2010 Microchip Technology Inc.
15
Opcode
Length
Size
Addr_MSB
Addr_LSW
Note:
Opcode
Field
Reserved
Reserved
12 11
QBLANK COMMAND
The QBLANK command does not check
the system operation Configuration bits
since these bits are not set to ‘1’ when a
Chip Erase is performed.
0xE
0x5
Length of program memory to check
(in 24-bit words) + Addr_MS
Most Significant Byte of the 24-bit
address
Least Significant 16 bits of the 24-bit
address
Addr_LSW
Size_LSW
Description
Length
Addr_MSB
Size_MSB
0
4.2.13
The QVER command queries the version of the
programming executive software stored in test
memory. The “version.revision” information is returned
in the response’s QE_Code using a single byte with the
following format: main version in upper nibble and
revision in the lower nibble (i.e., 0x23 means
version 2.3 of programming executive software).
Expected Response (2 words):
0x1BMN (where “MN” stands for version M.N)
0x0002
4.3
The programming executive sends a response to the
programmer for each command that it receives. The
response indicates if the command was processed
correctly. It includes any required response data or
error data.
The programming executive response set is shown in
Table
and description for each response. The response format
is described in
TABLE 4-2:
15
Opcode
Length
0x1
0x2
0x3
Opcode
Opcode
Field
4-2. This table contains the opcode, mnemonic
Programming Executive
Responses
12 11
QVER COMMAND
PASS
FAIL
NACK
Mnemonic
Section 4.3.1 “Response
0xB
0x1
PROGRAMMING EXECUTIVE
RESPONSE OPCODES
Command successfully
processed.
Command unsuccessfully
processed.
Command not known.
Description
Length
Description
DS70152H-page 29
Format”.
0