PIC18LF4455T-I/ML Microchip Technology, PIC18LF4455T-I/ML Datasheet - Page 213
![IC PIC MCU FLASH 12KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4455T-I/ML
Manufacturer Part Number
PIC18LF4455T-I/ML
Description
IC PIC MCU FLASH 12KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XR1.pdf
(438 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2455-ISO.pdf
(14 pages)
5.PIC18F2455-ISO.pdf
(8 pages)
6.PIC18F2455-ISO.pdf
(26 pages)
Specifications of PIC18LF4455T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PCM18XR1 PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2455-ISO PDF datasheet #4
- PIC18F2455-ISO PDF datasheet #5
- PIC18F2455-ISO PDF datasheet #6
- Current page: 213 of 438
- Download datasheet (7Mb)
REGISTER 19-6:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
R/W-0
GCEN
If the I
writes to the SSPBUF are disabled).
GCEN: General Call Enable bit (Slave mode only)
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK5:ADMSK2: Slave Address Mask Select bits
1 = Masking of corresponding bits of SSPADD enabled
0 = Masking of corresponding bits of SSPADD disabled
ADMSK1: Slave Address Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SPADD<1> only enabled
0 = Masking of SPADD<1> only disabled
In 10-Bit Addressing mode:
1 = Masking of SSPADD<1:0> enabled
0 = Masking of SSPADD<1:0> disabled
SEN: Stretch Enable bit
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
2
ACKSTAT
C module is active, this bit may not be set (no spooling) and the SSPBUF may not be written (or
R/W-0
SSPCON2: MSSP CONTROL REGISTER 2 (I
W = Writable bit
‘1’ = Bit is set
ADMSK5
R/W-0
(1)
PIC18F2455/2550/4455/4550
ADMSK4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADMSK3
R/W-0
2
C™ SLAVE MODE)
ADMSK2
R/W-0
x = Bit is unknown
ADMSK1
R/W-0
DS39632E-page 211
SEN
R/W-0
(1)
bit 0
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