AT89C5130A-RDRUM Atmel, AT89C5130A-RDRUM Datasheet - Page 125

• Manufacturer Part Number: AT89C5130A-RDRUM
• Description: MCU 8051 16K FLASH USB 64-VQFP
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5130A-RDRUM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -

Figure 21-6. Endpoint FIFO Configuration
21.3.2
21.3.3
21.4
4337K–USB–04/08
Bulk/Interrupt Transactions
Read Data FIFO
Write Data FIFO
Endpoint 0
Endpoint 6
The read access for each OUT endpoint is performed using the UEPDATX register.
After a new valid packet has been received on an Endpoint, the data are stored into the FIFO
and the byte counter of the endpoint is updated (UBYCTLX and UBYCTHX registers). The firm-
ware has to store the endpoint byte counter before any access to the endpoint FIFO. The byte
counter is not updated when reading the FIFO.
To read data from an endpoint, select the correct endpoint number in UEPNUM and read the
UEPDATX register. This action automatically decreases the corresponding address vector, and
the next data is then available in the UEPDATX register.
The write access for each IN endpoint is performed using the UEPDATX register.
To write a byte into an IN endpoint FIFO, select the correct endpoint number in UEPNUM and
write into the UEPDATX register. The corresponding address vector is automatically increased,
and another write can be carried out.
Warning 1: The byte counter is not updated.
Warning 2: Do not write more bytes than supported by the corresponding endpoint.
Bulk and Interrupt transactions are managed in the same way.
UEPSTA0
UEPSTA6
UBYCTH0
UBYCTH6
UEPCON0
UEPCON6
UBYCTL0
UBYCTL6
UEPDAT0
UEPDAT6
UEPNUM
0
1
2
3
4
5
6
X
AT89C5130A/31A-M
UEPSTAX
UBYCTHX
SFR registers
UEPCONX
UBYCTLX
UEPDATX
125