AT89C5130A-RDRUM Atmel, AT89C5130A-RDRUM Datasheet - Page 134
AT89C5130A-RDRUM
Manufacturer Part Number
AT89C5130A-RDRUM
Description
MCU 8051 16K FLASH USB 64-VQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheet
1.AT89C5130A-PUTUM.pdf
(188 pages)
Specifications of AT89C5130A-RDRUM
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
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21.8.2
21.8.3
134
AT89C5130A/31A-M
Resume
Upstream Resume
The stop of the 48 MHz clock from the PLL should be done in the following order:
When the USB controller is in Suspend state, the Resume detection is active even if all the
clocks are disabled and if the C51 is in Idle or Power-down mode. The WUPCPU bit is set by
hardware when a non-idle state occurs on the USB bus. This triggers an interrupt if enabled.
This interrupt wakes up the CPU from its Idle or Power-down state and the interrupt function is
then executed. The firmware will first enable the 48 MHz generation and then reset to 0 the
SUSPCLK bit in the USBCON register if needed.
The firmware has to clear the SPINT bit in the USBINT register before any other USB operation
in order to wake up the USB controller from its Suspend mode.
The USB controller is then re-activated.
Figure 21-11. Example of a Suspend/Resume Management
A USB device can be allowed by the Host to send an upstream resume for Remote Wake Up
purpose.
1. Clear suspend interrupt bit in USBINT (required to allow the USB pads to enter power
2. Enable USB resume interrupt.
3. Disable of the 48 MHz clock input of the USB controller by setting to 1 the SUSPCLK bit
4. Disable the PLL by clearing the PLLEN bit in the PLLCON register.
5. Make the CPU core enter power down mode by setting PDOWN bit in PCON.
down mode).
in the USBCON register.
Detection of a SUSPEND State
Detection of a RESUME State
WUPCPU
SPINT
microcontroller in Power-down
Clear WUPCPU Bit
USB Controller Init
Clear SUSPCLK
Set SUSPCLK
Clear SPINT
Disable PLL
Enable PLL
4337K–USB–04/08
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