ATMEGA164A-CU Atmel, ATMEGA164A-CU Datasheet - Page 90
![IC MCU AVR 16K 20MHZ 49VFBGA](/photos/12/32/123215/49c2-vfbga_sml.jpg)
ATMEGA164A-CU
Manufacturer Part Number
ATMEGA164A-CU
Description
IC MCU AVR 16K 20MHZ 49VFBGA
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA164A-CU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
49-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8272A–AVR–01/10
• INT0/RXD1/PCINT26 – Port D, Bit 2
INT0, External Interrupt source 0. The PD2 pin can serve as an external interrupt source to the
MCU.
RXD1, RXD0, Receive Data (Data input pin for the USART1). When the USART1 receiver is
enabled this pin is configured as an input regardless of the value of DDD2. When the USART
forces this pin to be an input, the pull-up can still be controlled by the PORTD2 bit.
PCINT26, Pin Change Interrupt Source 26: The PD2 pin can serve as an external interrupt
source.
• TXD0/PCINT25 – Port D, Bit 1
TXD0, Transmit Data (Data output pin for the USART0). When the USART0 Transmitter is
enabled, this pin is configured as an output regardless of the value of DDD1.
PCINT25, Pin Change Interrupt Source 25: The PD1 pin can serve as an external interrupt
source.
• RXD0/PCINT24 – Port D, Bit 0
RXD0, Receive Data (Data input pin for the USART0). When the USART0 receiver is enabled
this pin is configured as an input regardless of the value of DDD0. When the USART forces this
pin to be an input, the pull-up can still be controlled by the PORTD0 bit.
PCINT24, Pin Change Interrupt Source 24: The PD0 pin can serve as an external interrupt
source.
Table 13-13 on page 90
the overriding signals shown in
Table 13-13. Overriding Signals for Alternate Functions PD7:PD4
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
PD7/OC2A/
PCINT31
0
0
0
0
OC2A ENABLE
OCA2A
PCINT31 • PCIE3
1
PCINT31 INPUT
–
and
Table 13-14 on page 91
Figure 13-5 on page
PD6/ICP1/
OC2B/
PCINT30
0
0
0
0
OC2B ENABLE
OC2B
PCINT30 • PCIE3
1
ICP1 INPUT
PCINT30 INPUT
–
79.
relates the alternate functions of Port D to
PD5/OC1A/
PCINT29
0
0
0
0
OC1A ENABLE
OC1A
PCINT29 • PCIE3
1
PCINT29 INPUT
–
PD4/OC1B/XCK1/
PCINT28
0
0
0
0
OC1B ENABLE
OC1B
PCINT28 • PCIE3
1
PCINT28 INPUT
–
90
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