PIC18F242-E/SP Microchip Technology, PIC18F242-E/SP Datasheet - Page 3

• Manufacturer Part Number: PIC18F242-E/SP
• Description: IC MCU CMOS 40MHZ 8K FLASH 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F242-E/SP

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 23
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

6. Module: Program Memory
© 2005 Microchip Technology Inc.
A very small number of applications are
experiencing a low failure rate when using self-
write through code types of applications. The most
common of these are bootloader operations. This
failure mechanism is characterized by a few bytes
in program memory not being written as expected.
If this failure is going to occur, it will occur during a
self-write operation. If a failure is not immediately
observed, then there will be no data retention
issues. The failure does not occur when using an
external programmer through In-Circuit Serial
Programming™ (ICSP™).
This failure mechanism is dependent on the
sequence of instructions executed after self-
writes. Good power supply decoupling minimizes
this issue. It is recommended that you use a 0.1 μF
decoupling capacitor with each power pin pair. The
decoupling capacitor should be placed very close
to the power pins.
It is recommended that you perform statistically
significant
operating range (i.e., temperature and voltage)
with devices from multiple lots.
Work around
1. This work around only applies to PIC18F252
and PIC18F452 devices.
The program memory is divided into discrete
panels and the failure has only been observed
when a table write is executed from the same
panel it is programming. The table write (self-
write) within the same memory panel (0x0000
to 0x3FFF and 0x4000 to 0x7FFF) initiates a
condition that can cause a failure. The
firmware work around is to duplicate the partial
bootloader
functions) in two panels and ensure that the
bootloader code always programs a different
panel from where it resides. To accomplish
this, do the following:
• Receive data from communication channel
• Identify address to be written.
(normal operation for the bootloader).
testing
(two
within
instantiations
your
application’s
of
write
2. Use a similar device from the PIC18F4520
• If writing to an address within the same
• Always load holding latches (loading of
• Always initiate write from the opposite
• At the end of the successful write, code can
family.
memory panel that you are executing from
(0x0000 to 0x3FFF and 0x4000 to 0x7FFF),
then jump to the opposite memory panel. If
the bootloader resides between location
0x0000 to 0x3FFF, and writing to an
address between 0x0000 to 0x3FFF, then
jump to another instantiation of the code
located between 0x4000 to 0x7FFF and
vice versa.
TABLAT and then TBLWT*) from the oppo-
site panel. This will require duplicate code in
each panel to load data.
panel. This will require duplicate code in
each panel for the unlock sequence and
setting up the write bit.
return to the primary panel to get the next
data.
PIC18FXX2
DS80173C-page 3