DSPIC30F1010-20E/SP Microchip Technology, DSPIC30F1010-20E/SP Datasheet - Page 96

• Manufacturer Part Number: DSPIC30F1010-20E/SP
• Description: IC DSPIC MCU/DSP 6K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-20E/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Frequency: 15MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 6KB
• Supply Voltage Range: 3V To 5.5V
• Package: 28SPDIP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F4011/4012
15.1.4
In the Double Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR regis-
ter is equal to zero, as well as each time a period match
occurs. The postscaler selection bits have no effect in
this mode of the timer.
The Double Update mode provides two additional func-
tions to the user. First, the control loop bandwidth is
doubled because the PWM duty cycles can be
updated, twice per period. Second, asymmetrical
center-aligned PWM waveforms can be generated
which are useful for minimizing output waveform
distortion in certain motor control applications.
15.1.5
The input clock to PTMR (F
options of 1:1, 1:4, 1:16 or 1:64, selected by control
bits, PTCKPS<1:0>, in the PTCON SFR. The prescaler
counter is cleared when any of the following occurs:
• a write to the PTMR register
• a write to the PTCON register
• any device Reset
The PTMR register is not cleared when PTCON is
written.
15.1.6
The match output of PTMR can optionally be post-
scaled through a 4-bit postscaler (which gives a 1:1 to
1:16 scaling).
The postscaler counter is cleared when any of the
following occurs:
• a write to the PTMR register
• a write to the PTCON register
• any device Reset
The PTMR register is not cleared when PTCON is written.
DS70135E-page 94
Note:
DOUBLE UPDATE MODE
Programming a value of 0x0001 in the
Period register could generate a continu-
ous interrupt pulse, and hence, must be
avoided.
PWM TIME BASE PRESCALER
PWM TIME BASE POSTSCALER
OSC
/4) has prescaler
15.2
PTPER is a 15-bit register and is used to set the
counting period for the PWM time base. PTPER is a
double-buffered register. The PTPER buffer contents
are loaded into the PTPER register at the following
instants:
• Free-Running and Single-Shot modes: When the
• Continuous Up/Down Count modes: When the
The value held in the PTPER buffer is automatically
loaded into the PTPER register when the PWM time
base is disabled (PTEN = 0).
The
Equation 15-1:
EQUATION 15-1:
If the PWM time base is configured for one of the
Continuous Up/Down Count modes, the PWM period is
provided by Equation 15-2.
EQUATION 15-2:
The maximum resolution (in bits) for a given device
oscillator and PWM frequency can be determined using
Equation 15-3:
EQUATION 15-3:
PTMR register is reset to zero after a match with
the PTPER register.
PTMR register is zero.
PWM
PWM Period
Resolution =
T
T
PWM
PWM
period
=
=
(PTMR Prescale Value)
(PTMR Prescale Value)
2 T
T
PWM PERIOD
PWM PERIOD
(CENTER-ALIGNED
MODE)
PWM RESOLUTION
CY
can
© 2007 Microchip Technology Inc.
CY
log (2
•
•
(PTPER + 1)
PTPER + 0.75
be
log (2)
•
T
PWM
determined
/T
CY
)
using