PIC18F452-I/PG Microchip Technology, PIC18F452-I/PG Datasheet - Page 200
![IC MCU FLASH 16KX16 W/AD 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F452-I/PG
Manufacturer Part Number
PIC18F452-I/PG
Description
IC MCU FLASH 16KX16 W/AD 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F452-I/PG
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
ACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 200 of 332
- Download datasheet (6Mb)
PIC18FXX2
REGISTER 19-4:
REGISTER 19-5:
DS39564C-page 198
bit 7-1
bit 0
bit 7
bit 6-3
bit 2
bit 1
bit 0
CONFIGURATION REGISTER 3 HIGH (CONFIG3H: BYTE ADDRESS 300005h)
CONFIGURATION REGISTER 4 LOW (CONFIG4L: BYTE ADDRESS 300006h)
Legend:
R = Readable bit
- n = Value when device is unprogrammed
Unimplemented: Read as ‘0’
CCP2MX: CCP2 Mux bit
1 = CCP2 input/output is multiplexed with RC1
0 = CCP2 input/output is multiplexed with RB3
Legend:
R = Readable bit
- n = Value when device is unprogrammed
DEBUG: Background Debugger Enable bit
1 = Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
0 = Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
Unimplemented: Read as ‘0’
LVP: Low Voltage ICSP Enable bit
1 = Low Voltage ICSP enabled
0 = Low Voltage ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack Full/Underflow will cause RESET
0 = Stack Full/Underflow will not cause RESET
bit 7
bit 7
BKBUG
R/P-1
U-0
—
U-0
U-0
—
—
P = Programmable bit
C = Clearable bit
U-0
—
U-0
—
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
U-0
—
—
R/P-1
LVP
U-0
—
© 2006 Microchip Technology Inc.
U-0
U-0
—
—
CCP2MX
STVREN
R/P-1
R/P-1
bit 0
bit 0
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