PIC18F4220-E/P Microchip Technology, PIC18F4220-E/P Datasheet - Page 8
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PIC18F4220-E/P
Manufacturer Part Number
PIC18F4220-E/P
Description
IC MCU FLASH 2KX16 EEPROM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1320-ISS.pdf
(36 pages)
3.PIC18F2220-ISO.pdf
(394 pages)
4.PIC18F2220-ISO.pdf
(6 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(8 pages)
7.PIC18F2220-ISO.pdf
(6 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18F4220-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4220-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18FX220/X320
2.5
The High-Voltage ICSP Program/Verify mode is
entered by holding PGC and PGD low, and then raising
MCLR/V
the code memory, data EEPROM, ID locations and
Configuration bits can be accessed and written in serial
fashion.
The sequence that enters the device into the
Programming/Verify mode places all unused I/Os in
the high-impedance state.
FIGURE 2-10:
2.6
When the LVP Configuration bit is ‘1’ (see Section 5.3
“Single-Supply ICSP Programming”), the Low-
Voltage ICSP mode is enabled. Low-Voltage ICSP
Program/Verify mode is entered by holding PGC and
PGD low, placing a logic high on PGM and then raising
MCLR/V
dedicated to the programming function and ceases to
be a general purpose I/O pin.
The sequence that enters the device into the
Programming/Verify mode places all unused I/Os in the
high-impedance state.
FIGURE 2-11:
DS39592F-page 8
MCLR/V
V
PGM
PGD
PGC
MCLR/V
V
PGD
PGC
DD
DD
PP
PP
Entering High-Voltage ICSP
Program/Verify Mode
Entering Low-Voltage ICSP
Program/Verify Mode
D110
to V
to V
PP
PP
V
IH
IHH
IH
. In this mode, the RB5/PGM pin is
(high voltage). Once in this mode,
V
P13
ENTERING HIGH-VOLTAGE
PROGRAM/VERIFY MODE
ENTERING LOW-VOLTAGE
PROGRAM/VERIFY MODE
P15
PGD = Input
IH
PGD = Input
P12
P12
2.7
The PGC pin is used as a clock input pin and the PGD
pin is used for entering command bits and data input/
output during serial operation. Commands and data are
transmitted on the rising edge of PGC, latched on the
falling edge of PGC and are sent Least Significant bit
(LSb) first.
2.7.1
All instructions are 20 bits, consisting of a leading 4-bit
command, followed by a 16-bit operand which depends
on the type of command being executed. To input a
command, PGC is cycled four times. The commands
needed for programming and verification are shown in
Table 2-3.
TABLE 2-3:
Depending on the 4-bit command, the 16-bit operand
represents 16 bits or 8 bits of data.
Throughout this specification, commands and data are
presented as illustrated in Table 2-4. The 4-bit com-
mand is shown MSb first. The command operand or
“Data Payload” is shown <MSB:LSB>. Figure 2-12
demonstrates how to serially present a 20-bit
command/operand to the device.
TABLE 2-4:
Core Instruction
(Shift in 16-bit instruction)
Shift Out TABLAT Register
Table Read
Table Read, Post-Increment
Table Read, Post-Decrement
Table Read, Pre-Increment
Table Write
Table Write, Post-Increment by 2
Table Write, Post-Decrement by 2
Table Write, Start Programming
Command
1101
4-Bit
Serial Program/Verify Operation
4-BIT COMMANDS
Description
Payload
3C 40
Data
COMMANDS FOR
PROGRAMMING
SAMPLE COMMAND
SEQUENCE
2010 Microchip Technology Inc.
Table Write,
post-increment by 2
Core Instruction
Command
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111
4-Bit