AT89C5131A-TISUL Atmel, AT89C5131A-TISUL Datasheet - Page 35

MCU 8051 32K FLASH USB 28-SOIC

AT89C5131A-TISUL

Manufacturer Part Number
AT89C5131A-TISUL
Description
MCU 8051 32K FLASH USB 28-SOIC
Manufacturer
Atmel
Series
AT89C513xr
Datasheets

Specifications of AT89C5131A-TISUL

Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
2-Wire, EUART, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
34
Number Of Timers
3 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
Minimum Operating Temperature
- 40 C
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
48MHz
Total Internal Ram Size
1.25KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
SOIC
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details
Registers
4338F–USB–08/07
Table 36. FCON (S:D1h)
Flash Control Register
Reset Value = 0000 0000b
Bit Number
FPL3
7-4
2-1
7
3
0
Mnemonic Description
FMOD1:0
FBUSY
FPL3:0
FPL2
FPS
Bit
6
Programming Launch Command Bits
Write 5Xh followed by AXh to launch the programming according to FMOD1:0.
(see Table 35.)
Flash Map Program Space
Set to map the column latch space in the data memory space.
Clear to re-map the data memory space.
Flash Mode
See Table 34 or Table 35.
Flash Busy
Set by hardware when programming is in progress.
Clear by hardware when programming is done.
Can not be cleared by software.
FPL1
5
FPL0
4
FPS
3
FMOD1
2
FMOD0
1
FBUSY
0
35

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