AT89C5131A-TISUL Atmel, AT89C5131A-TISUL Datasheet - Page 85

MCU 8051 32K FLASH USB 28-SOIC

AT89C5131A-TISUL

Manufacturer Part Number
AT89C5131A-TISUL
Description
MCU 8051 32K FLASH USB 28-SOIC
Manufacturer
Atmel
Series
AT89C513xr
Datasheets

Specifications of AT89C5131A-TISUL

Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
2-Wire, EUART, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
34
Number Of Timers
3 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
Minimum Operating Temperature
- 40 C
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
48MHz
Total Internal Ram Size
1.25KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Package Type
SOIC
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details
Keyboard Interface
Introduction
Description
Interrupt
4338F–USB–08/07
The AT89C5131A-L implements a keyboard interface allowing the connection of a 8 x n
matrix keyboard. It is based on 8 inputs with programmable interrupt capability on both
high or low level. These inputs are available as an alternate function of P1 and allow to
exit from idle and power down modes.
The keyboard interface communicates with the C51 core through 3 special function reg-
isters: KBLS, the Keyboard Level Selection register (Table 70), KBE, The Keyboard
interrupt Enable register (Table 69), and KBF, the Keyboard Flag register (Table 68).
The keyboard inputs are considered as 8 independent interrupt sources sharing the
same interrupt vector. An interrupt enable bit (KBD in IE1) allows global enable or dis-
able of the keyboard interrupt (see Figure 40). As detailed in Figure 41 each keyboard
input has the capability to detect a programmable level according to KBLS.x bit value.
Level detection is then reported in interrupt flags KBF.x that can be masked by software
using KBE.x bits.
This structure allow keyboard arrangement from 1 by n to 8 by n matrix and allow usage
of P1 inputs for other purpose.
Figure 40. Keyboard Interface Block Diagram
Figure 41. Keyboard Input Circuitry
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P1:x
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Vcc
Internal Pull-up
KBLS.x
0
1
KBF.x
KBD
IE1.0
KBE.x
Keyboard Interface
Interrupt Request
KBDIT
85

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