AT89C51RB2-3CSUL Atmel, AT89C51RB2-3CSUL Datasheet - Page 67
![MCU 8051 16K FLASH 3V 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51RB2-3CSUL
Manufacturer Part Number
AT89C51RB2-3CSUL
Description
MCU 8051 16K FLASH 3V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51RB2-RLTIL.pdf
(127 pages)
Specifications of AT89C51RB2-3CSUL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
Through Hole
3rd Party Development Tools
PK51, CA51, A51, ULINK2
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
4180E–8051–10/06
Table 53. KBLS Register
KBLS - Keyboard Level Selector Register (9Ch)
Reset Value = 0000 0000b
Number
KBLS7
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
KBLS6
KBLS7
KBLS6
KBLS5
KBLS4
KBLS3
KBLS2
KBLS1
KBLS0
Bit
6
Keyboard Line 7 Level Selection Bit
Cleared to enable a low level detection on Port line 7.
Set to enable a high level detection on Port line 7.
Keyboard Line 6 Level Selection Bit
Cleared to enable a low level detection on Port line 6.
Set to enable a high level detection on Port line 6.
Keyboard Line 5 Level Selection Bit
Cleared to enable a low level detection on Port line 5.
Set to enable a high level detection on Port line 5.
Keyboard Line 4 Level Selection Bit
Cleared to enable a low level detection on Port line 4.
Set to enable a high level detection on Port line 4.
Keyboard Line 3 Level Selection Bit
Cleared to enable a low level detection on Port line 3.
Set to enable a high level detection on Port line 3.
Keyboard Line 2 Level Selection Bit
Cleared to enable a low level detection on Port line 2.
Set to enable a high level detection on Port line 2.
Keyboard Line 1 Level Selection Bit
Cleared to enable a low level detection on Port line 1.
Set to enable a high level detection on Port line 1.
Keyboard Line 0 Level Selection Bit
Cleared to enable a low level detection on Port line 0.
Set to enable a high level detection on Port line 0.
KBLS5
5
KBLS4
4
KBLS3
3
AT89C51RB2/RC2
KBLS2
2
KBLS1
1
KBLS0
0
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