AT89C51RB2-3CSUL Atmel, AT89C51RB2-3CSUL Datasheet - Page 92
![MCU 8051 16K FLASH 3V 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51RB2-3CSUL
Manufacturer Part Number
AT89C51RB2-3CSUL
Description
MCU 8051 16K FLASH 3V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51RB2-RLTIL.pdf
(127 pages)
Specifications of AT89C51RB2-3CSUL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
Through Hole
3rd Party Development Tools
PK51, CA51, A51, ULINK2
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Functional Description
Figure 37. Bootloader Functional Description
92
AT89C51RB2/RC2
Specific Protocol
Exernal Host with
Communication
On the above diagram, the on-chip bootloader processes are:
•
The purpose of this process is to manage the communication and its protocol between
the on-chip bootloader and a external device. The on-chip ROM implement a serial pro-
tocol (see section Bootloader Protocol). This process translate serial communication
frame (UART) into Flash memory acess (read, write, erase ...).
•
Several Application Program Interface (API) calls are available for use by an application
program to permit selective erasing and programming of Flash pages. All calls are made
through a common interface (API calls), included in the ROM bootloader. The program-
ming functions are selected by setting up the microcontroller’s registers before making a
call to a common entry point (0xFFF0). Results are returned in the registers. The pur-
pose on this process is to translate the registers values into internal Flash Memory
Management.
•
This process manages low level access to Flash memory (performs read and write
access).
ISP Communication
ISP Communication Management
User Call Management
Flash Memory Management
Management
Flash Memory
Management
Flash
Memory
Management (API )
User Call
Application
User
4180E–8051–10/06