PIC18F6525T-I/PT Microchip Technology, PIC18F6525T-I/PT Datasheet - Page 10
![IC PIC MCU FLASH 24KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F6525T-I/PT
Manufacturer Part Number
PIC18F6525T-I/PT
Description
IC PIC MCU FLASH 24KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6525-IPT.pdf
(396 pages)
3.PIC18F6525-IPT.pdf
(8 pages)
4.PIC18F6525-IPT.pdf
(38 pages)
Specifications of PIC18F6525T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6525T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6X2X/8X2X
TABLE 3-3:
FIGURE 3-3:
DS30499B-page 10
Step 1: Direct access to config memory.
Step 2: Configure device for multi-panel writes.
Step 3: Direct access to code memory.
Step 4: Enable erase and erase single row of all panels at an offset.
Step 5: Repeat step 4, with address pointer incremented by 64 until all panels are erased.
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
1100
0000
0000
0000
0000
0000
0000
1111
0000
4-bit
Addr = Addr + 64
8E A6
8C A6
84 A6
0E 3C
6E F8
0E 00
6E F7
0E 06
6E F6
00 40
8E A6
9C A6
6A F8
6A F7
6A F6
88 A6
<DummyLSB>
<DummyMSB>
00 00
ERASE CODE MEMORY CODE SEQUENCE
Data Payload
MULTI-PANEL SINGLE ROW ERASE CODE MEMORY FLOW
BSF
BSF
BSF
MOVLW 3Ch
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 06h
MOVWF TBLPTRL
Write 40h to 3C0006h to enable multi-panel erase.
BSF
BCF
CLRF
CLRF
CLRF
BSF
Write 2 dummy bytes and start programming.
NOP - hold PGC high for time P9.
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
EECON1, EEPGD
EECON1, CFGS
TBLPTRU
TBLPTRH
TBLPTRL
EECON1, FREE
No
Start Erase Sequence
and hold PGC High
Multi-Panel Erase
Delay P9 + P10
Time for Erase
Until Done
Device for
Configure
to Occur
Panels
Done?
Start
Done
All
Yes
Addr = 0
Core Instruction
2003 Microchip Technology Inc.