PIC18F2553-I/SP Microchip Technology, PIC18F2553-I/SP Datasheet - Page 7
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PIC18F2553-I/SP
Manufacturer Part Number
PIC18F2553-I/SP
Description
IC PIC MCU FLASH 16KX16 28SDIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2458-ISO.pdf
(46 pages)
3.PIC18F2458-ISO.pdf
(6 pages)
4.PIC18F2458-ISO.pdf
(6 pages)
5.PIC18F2458-ISO.pdf
(6 pages)
Specifications of PIC18F2553-I/SP
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
2KB
Cpu Speed
48MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
MSSP, I2C, SPI, EUSART, CCP, ECCP
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM163025, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
5 V
A/d Bit Size
12 bit
A/d Channels Available
10
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163025 - PIC DEM FULL SPEED USB DEMO BRD
Lead Free Status / Rohs Status
Details
For PIC18FX4X0/X4X3 devices, the code memory
space extends from 000000h to 003FFFh (16 Kbytes)
in two 8-Kbyte blocks. Addresses, 000000h through
0003FFh, however, define a “Boot Block” region that is
treated separately from Block 0. All of these blocks
define code protection boundaries within the code
memory space.
FIGURE 2-6:
2010 Microchip Technology Inc.
Note:
1FFFFFh
3FFFFFh
000000h
200000h
MEMORY MAP AND THE CODE MEMORY SPACE
FOR PIC18FX4X0/X4X3 DEVICES
Sizes of memory areas are not to scale.
Unimplemented
Code Memory
Configuration
Read as ‘0’
and ID
Space
PIC18F2XXX/4XXX FAMILY
008000h
TABLE 2-5:
PIC18F2410
PIC18F2420
PIC18F2423
PIC18F2450
PIC18F4410
PIC18F4420
PIC18F4450
Device
(PIC18FX4X0/X4X3)
MEMORY SIZE/
Unimplemented
Reads all ‘0’s
Boot Block
16 Kbytes
DEVICE
Block 0
Block 1
IMPLEMENTATION OF CODE
MEMORY
Code Memory Size (Bytes)
000000h-003FFFh (16K)
000000h
0007FFh
000800h
001FFFh
002000h
003FFFh
004000h
005FFFh
006000h
007FFFh
1FFFFFh
Address
Range
DS39622L-page 7