PIC18F4580-I/P Microchip Technology, PIC18F4580-I/P Datasheet - Page 132

• Manufacturer Part Number: PIC18F4580-I/P
• Description: IC PIC MCU FLASH 16KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4580-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2480/2580/4480/4580
TABLE 10-1:
DS39637C-page 130
RA0/AN0/CV
RA1/AN1
RA2/AN2/V
RA3/AN3/V
RA4/T0CKI
RA5/AN4/SS/HLVDIN
OSC2/CLKO/RA6
OSC1/CLKI/RA7
Legend:
Note 1:
Pin Name
REF
REF
OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input
Available on 40/44-pin devices only.
REF
-
+
PORTA I/O SUMMARY
Function
CV
HLVDIN
V
T0CKI
OSC2
CLKO
OSC1
V
CLKI
RA0
AN0
RA1
AN1
RA2
AN2
RA3
AN3
RA4
RA5
AN4
RA6
RA7
REF
REF
SS
REF
+
-
(1)
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
TRIS
0
1
1
x
0
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
1
1
1
x
x
0
1
x
x
0
1
Buffer
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
TTL
DIG
DIG
TTL
DIG
TTL
ST
Preliminary
LATA<0> data output.
PORTA<0> data input.
digital input (read as clear – low level).
output overrides the digital I/O (read as clear – low level).
LATA<1> data output.
PORTA<1> data input.
digital input (read as clear – low level).
LATA<2> data output.
PORTA<2> data input.
digital input (read as clear – low level).
LATA<3> data output.
PORTA<3> data input.
digital input (read as clear – low level).
LATA<4> data output.
PORTA<4> data input.
LATA<5> data output.
PORTA<5> data input.
digital input (read as clear – low level).
Slave select input for MSSP.
Enabling OSC2 overrides digital I/O.
Output connection; selected by FOSC3:FOSC0 Configuration bits.
Enabling CLKO overrides digital I/O (F
LATA<6> data output.
PORTA<6> data input.
Main oscillator input connection determined by FOSC3:FOSC0
Configuration bits. Enabling OSC1 overrides digital I/O.
Configuration bits. Enabling CLKI overrides digital I/O.
LATA<7> data output.
PORTA<7> data input.
A/D input channel 0. Enabled on POR; this analog input overrides the
Comparator voltage reference analog output. Enabling this analog
A/D input channel 1. Enabled on POR; this analog input overrides the
A/D input channel 2. Enabled on POR; this analog input overrides the
A/D and comparator negative voltage analog input.
A/D input channel 3. Enabled on POR; this analog input overrides the
A/D and comparator positive voltage analog input.
Timer0 clock input.
A/D input channel 4. Enabled on POR; this analog input overrides the
High/Low-Voltage Detect external trip point input.
Output connection; selected by FOSC3:FOSC0 Configuration bits.
Main clock input connection determined by FOSC3:FOSC0
Description
© 2007 Microchip Technology Inc.
OSC
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