PIC18F2680-I/SO Microchip Technology, PIC18F2680-I/SO Datasheet - Page 454

• Manufacturer Part Number: PIC18F2680-I/SO
• Description: IC MCU FLASH 32KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2680-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.25 KB
• Interface Type: I2C/SPI/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 28
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
• Minimum Operating Temperature: - 25 C
• On-chip Adc: 8-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3-DB18F4680 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2585/2680/4585/4680
FIGURE 27-22:
TABLE 27-25: A/D CONVERSION REQUIREMENTS
DS39625B-page 452
130
131
132
135
136
Note 1:
Param
No.
A/D CLK
Note 1:
2:
3:
4:
5:
A/D DATA
SAMPLE
T
T
T
T
T
ADRES
Symbol
BSF ADCON0, GO
AD
CNV
ACQ
SWC
AMP
ADIF
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (AV
50 .
On the following cycle of the device clock.
See Section 19.0 “10-Bit Analog-to-Digital Converter (A/D) Module” for minimum conditions when input
voltage has changed more than 1 LSb.
GO
2:
Q4
(1)
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
A/D Clock Period
Conversion Time
(not including acquisition time) (Note 2)
Acquisition Time (Note 3)
Switching Time from Convert
Amplifier Settling Time (Note 5)
132
A/D CONVERSION TIMING
Characteristic
(Note 2)
DD
9
to AV
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
8
SS
OLD_DATA
or AV
Sample
7
Preliminary
SS
. . .
to AV
SAMPLING STOPPED
CY
CY
is added before the A/D clock starts.
Min
1.6
3.0
2.0
3.0
15
10
11
—
DD
1
cycle.
. . .
131
130
). The source impedance (R
(Note 4)
20
20
Max
6.0
9.0
12
2
—
—
—
(1)
(1)
1
Units
T
—
AD
s
s
s
s
s
s
s
T
V
T
A/D RC mode
V
A/D RC mode
-40 C to +85 C
This may be used if the “new” input
voltage has not changed by more
than 1 LSb (i.e., 5 mV @ 5.12V)
from the last sampled voltage (as
stated on C
0 C
OSC
OSC
DD
DD
 2004 Microchip Technology Inc.
0
= 2.0V;
= 2.0V;
based, V
based, V
S
to
AD
) on the input channels is
clock divider.
Conditions
HOLD
+85 C
NEW_DATA
DONE
REF
REF
).
T
full range
CY
3.0V