AT89C5132-RORUL Atmel, AT89C5132-RORUL Datasheet - Page 94
AT89C5132-RORUL
Manufacturer Part Number
AT89C5132-RORUL
Description
MCU 8051 FLASH USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-RORUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
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Figure 16-17. Data Block Transmission Flows
16.6.4
16.6.4.1
16.6.4.2
94
AT89C5132
Data Receiver
Configuration
Data Reception
Write 16 Data to MMDAT
Write 8 Data to MMDAT
a. Polling Mode
Start Transmission
F1EI or F2EI = 1?
Transmission
No More Data
FIFO Empty?
FIFOs Filling
Data Block
FIFO Filling
DATEN = 1
DATEN = 0
to Send?
To receive data from the card, the user must first configure the data controller in reception mode
by clearing the DATDIR bit in MMCON1 register.
Figure 16-18 summarizes the data stream reception flows in both polling and interrupt modes
while Figure 16-19 summarizes the data block reception flows in both polling and interrupt
modes, these flows assume that block length is greater than 16 Bytes.
The end of data frame (block or stream) reception is signalled by the EOFI flag in MMINT regis-
ter. This flag may generate an MMC interrupt request as detailed in Section "Interrupt", page 96.
When this flag is set, two other flags in MMSTA register: DATFS and CRC16S give a status on
the frame received. DATFS indicates if the frame format is correct or not: a valid End bit has
been received, and CRC16S indicates if the CRC16 computation is correct or not. In case of
data stream CRC16S has no meaning and stays cleared.
According to the MMC specification data transmission, the card starts after the access time
delay (formally N
locking of the MMC controller when card does not send its data (e.g. physically removed from
the bus), the user must launch a time-out period to exit from such situation. In case of time-out
AC
parameter) beginning from the End bit of the read command. To avoid any
Write 16 Data to MMDAT
Unmask FIFOs Empty
Start Transmission
Initialization
FIFOs Filling
Data Block
DATEN = 1
DATEN = 0
F1EM = 0
F2EM = 0
b. Interrupt Mode
Write 8 Data to MMDAT
Transmission ISR
Mask FIFOs Empty
F1EI or F2EI = 1?
No More Data
FIFO Empty?
Data Block
FIFO Filling
To Send?
F1EM = 1
F2EM = 1
4173E–USB–09/07
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