PIC18LF4680-I/PT Microchip Technology, PIC18LF4680-I/PT Datasheet - Page 5
![IC MCU FLASH 32KX16 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18LF4680-I/PT
Manufacturer Part Number
PIC18LF4680-I/PT
Description
IC MCU FLASH 32KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18LF4680-I/PT
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
1024Byte
Ram Memory Size
3328Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4680-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
19. Module: Interrupts
EXAMPLE 2:
© 2007 Microchip Technology Inc.
ISR @ 0x0008
Foo:
If an interrupt occurs during a two-cycle instruction
that modifies the STATUS, BSR or WREG register,
the unmodified value of the register will be saved
to the corresponding Fast Return (Shadow)
register. Upon a fast return from the interrupt, the
unmodified value will be restored to the STATUS,
BSR or WREG register.
For example, if a high priority interrupt occurs dur-
ing the instruction “MOVFF TEMP, WREG”, the
MOVFF instruction will be completed and WREG
will be loaded with the value of TEMP before
branching to ISR. However, the previous value of
WREG will be saved to the Fast Return register
during ISR branching. Upon return from the inter-
rupt with a fast return, the previous value of WREG
in the Fast Return register will be written to WREG.
This results in WREG containing the value it had
before execution of MOVFF TEMP, WREG.
Affected instructions are:
MOVFF
where Fd is WREG, BSR or STATUS;
MOVSF
where Fd is WREG, BSR or STATUS; and
MOVSS
where the destination is WREG, BSR or STATUS.
2. C Language Programming: The exact work
CALL
POP
:
:
RETFIE
around depends on the compiler in use. Please
refer to your C compiler documentation for
more details.
If using the Microchip MPLAB
define both high and low priority interrupt han-
dler functions as “low priority” by using the
pragma interruptlow directive.
This directive instructs the compiler to not use
the RETFIE FAST instruction. If the proper high
priority interrupt bit is set in the IPRx register,
then the interrupt is treated as high priority in
spite of the pragma interruptlow directive.
The code segment, shown in Example 3 on the
next page, demonstrates the work around
using the C18 compiler.
Fs, Fd
Zs, Fd
[Zs], [Zd]
Foo, FAST
FAST
®
C18 C Compiler,
; store current value of WREG, BSR, STATUS for a second time
; clears return address of Foo call
; insert high priority ISR code here
PIC18F2585/2680/4585/4680
Work around
1. Assembly Language Programming:
a)
b)
If any two-cycle instruction is used to
modify the WREG, BSR or STATUS
register, do not use the RETFIE FAST
instruction to return from the interrupt.
Instead, save/restore WREG, BSR and
STATUS via software per Example 8-1
in the Device Data Sheet. Alternatively,
in the case of MOVFF, use the MOVF
instruction to write to WREG instead.
For example, use:
MOVF
MOVWF BSR
instead of MOVFF TEMP, BSR.
As another alternative, the following
work around shown in Example 2 can
be used. This example overwrites the
Fast Return register by making a
dummy call to Foo with the fast option
in the high priority service routine.
TEMP, W
DS80202G-page 5