PIC17C756A-33E/L Microchip Technology, PIC17C756A-33E/L Datasheet - Page 197
![IC MCU CMOS 33MHZ 16K EPRM68PLCC](/photos/12/13/121323/c04-049_l_sml.jpg)
PIC17C756A-33E/L
Manufacturer Part Number
PIC17C756A-33E/L
Description
IC MCU CMOS 33MHZ 16K EPRM68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(6 pages)
Specifications of PIC17C756A-33E/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
68-PLCC
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
902 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C756A-33E/L
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC17C756A-33E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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18.0
The PIC17CXXX instruction set consists of 58 instruc-
tions. Each instruction is a 16-bit word divided into an
OPCODE and one or more operands. The opcode
specifies the instruction type, while the operand(s) fur-
ther specify the operation of the instruction. The
PIC17CXXX instruction set can be grouped into three
types:
• byte-oriented
• bit-oriented
• literal and control operations
These formats are shown in Figure 18-1.
Table 18-1 shows the field descriptions for the
opcodes. These descriptions are useful for understand-
ing the opcodes in Table 18-2 and in each specific
instruction descriptions.
For byte-oriented instructions, 'f' represents a file
register designator and 'd' represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If 'd' = '0', the result is
placed in the WREG register. If 'd' = '1', the result is
placed in the file register specified by the instruction.
For bit-oriented instructions, 'b' represents a bit field
designator which selects the number of the bit affected
by the operation, while 'f' represents the number of the
file in which the bit is located.
For literal and control operations, 'k' represents an 8-
or 13-bit constant or literal value.
The instruction set is highly orthogonal and is grouped
into:
• byte-oriented operations
• bit-oriented operations
• literal and control operations
All instructions are executed within one single instruc-
tion cycle, unless:
• a conditional test is true
• the program counter is changed as a result of an
• a table read or a table write instruction is executed
One instruction cycle consists of four oscillator periods.
Thus, for an oscillator frequency of 25 MHz, the normal
instruction execution time is 160 ns. If a conditional test
is true or the program counter is changed as a result of
an instruction, the instruction execution time is 320 ns.
instruction
(in this case, the execution takes two instruction
cycles with the second cycle executed as a NOP)
2000 Microchip Technology Inc.
INSTRUCTION SET SUMMARY
TABLE 18-1:
GLINTD Global Interrupt Disable bit (CPUSTA<4>)
TBLPTR Table Pointer (16-bit)
TBLATL Table Latch low byte
TBLATH Table Latch high byte
label Label name
C,DC,
TBLAT Table Latch (16-bit) consists of high byte (TBLATH)
WREG Working register (accumulator)
dest Destination either the WREG register or the speci-
i
Field
Z,OV
talics User defined term (font is courier)
TOS
BSR
WDT
< >
( )
PC
TO
PD
[ ]
f
p
i
t
b
k
x
d
u
s
Register file address (00h to FFh)
Peripheral register file address (00h to 1Fh)
Table pointer control i = ’0’ (do not change)
i = ’1’ (increment after instruction execution)
Table byte select t = ’0’ (perform operation on lower
byte)
t = ’1’ (perform operation on upper byte literal field,
constant data)
Bit address within an 8-bit file register
Literal field, constant data or label
Don’t care location (= ’0’ or ’1’)
The assembler will generate code with x = ’0’. It is
the recommended form of use for compatibility with
all Microchip software tools.
Destination select
0 = store result in WREG
1 = store result in file register f
Default is d = ’1’
Unused, encoded as ’0’
Destination select
0 = store result in file register f and in the WREG
1 = store result in file register f
Default is s = ’1’
ALU status bits Carry, Digit Carry, Zero, Overflow
and low byte (TBLATL)
Top-of-Stack
Program Counter
Bank Select Register
Watchdog Timer Counter
Time-out bit
Power-down bit
fied register file location
Options
Contents
Assigned to
Register bit field
In the set of
OPCODE FIELD
DESCRIPTIONS
PIC17C7XX
Description
DS30289B-page 197
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