ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 330
![IC MCU 32BIT 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
ATSAM3U2EA-AU
Manufacturer Part Number
ATSAM3U2EA-AU
Description
IC MCU 32BIT 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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22.2.5.5
22.2.5.6
330
SAM3U Series
Flash General-purpose NVM Commands
Flash Security Bit Command
Lock bits can be read using Get Lock Bit command (GLB). The n
n of the bit mask is set..
Table 22-10. Get Lock Bit Command
General-purpose NVM bits (GP NVM bits) can be set using the Set GPNVM command (SGPB).
This command also activates GP NVM bits. A bit mask is provided as argument to the com-
mand. When bit 0 of the bit mask is set, then the first GP NVM bit is activated.
Likewise, the Clear GPNVM command (CGPB) is used to clear general-purpose NVM bits. All
the general-purpose NVM bits are also cleared by the EA command. The general-purpose NVM
bit is deactivated when the corresponding bit in the pattern value is set to 1.
Table 22-11. Set/Clear GP NVM Command
General-purpose NVM bits can be read using the Get GPNVM Bit command (GGPB). The n
GP NVM bit is active when bit n of the bit mask is set..
Table 22-12. Get GP NVM Bit Command
A security bit can be set using the Set Security Bit command (SSE). Once the security bit is
active, the Fast Flash programming is disabled. No other command can be run. An event on the
Erase pin can erase the security bit once the contents of the Flash have been erased.
The AT9SAM3U256 security bit is controlled by the EEFC0. To use the Set Security Bit com-
mand, the EEFC0 must be selected using the Select EFC command.
Step
1
2
Step
1
2
Step
1
2
Handshake Sequence
Write handshaking
Read handshaking
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
DATA[15:0]
GLB
Lock Bit Mask Status
0 = Lock bit is cleared
1 = Lock bit is set
DATA[15:0]
SGPB or CGPB
GP NVM bit pattern value
DATA[15:0]
GGPB
GP NVM Bit Mask Status
0 = GP NVM bit is cleared
1 = GP NVM bit is set
th
lock bit is active when the bit
6430D–ATARM–25-Mar-11
th
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