DSPIC30F6013T-20E/PF Microchip Technology, DSPIC30F6013T-20E/PF Datasheet - Page 5
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DSPIC30F6013T-20E/PF
Manufacturer Part Number
DSPIC30F6013T-20E/PF
Description
IC DSPIC MCU/DSP 132K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F6014-20IPF.pdf
(228 pages)
2.DSPIC30F6014-20IPF.pdf
(22 pages)
3.DSPIC30F6014-20IPF.pdf
(28 pages)
Specifications of DSPIC30F6013T-20E/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TQFP, 80-VQFP
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1AC164314 - MODULE SKT FOR PM3 80PFAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F6013T20EP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6013T-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Silicon Errata Issues
1. Module: Data EEPROM
2. Module: CPU
© 2010 Microchip Technology Inc.
Note:
At device throughput greater than 20 MIPS for
V
V
instructions (TBLRDL/TBLRDH) and instructions
that use Program Space Visibility do not function
correctly when reading data from data EEPROM.
Work around
When reading data from data EEPROM, the
application should
operation to lower the frequency of the system
clock so that the throughput is less than 20 MIPS.
This may be easily performed at any time via the
Oscillator
(OSCCON<7:6>), that allow the application to
divide the system clock down by a factor of 4, 16
or 64.
Affected Silicon Revisions
The US bit (CORCON<12>) controls whether MAC-
type DSP instructions operate in Signed or Unsigned
mode. The device defaults to a Signed mode on
power-up (US = 0).
For this revision of silicon, MAC-type DSP
instructions do not function as specified in
Unsigned mode (US = 1). Also, for this revision,
the US bit will always read as ‘0’.
Work around
Ensure that the US bit is not set by the application.
In
multiplications, use the MCU Multiply instruction,
MUL.UU.
Affected Silicon Revisions
DD
DD
A3
A3
X
X
, in the range 4.75V to 5.5V (or 10 MIPS for
order
in the range 3V to 3.6V), Table Read
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (B2).
B1
B1
X
X
to
Postscaler
B2
B2
X
X
perform
perform a clock switch
bits,
unsigned
POST<1:0>
integer
dsPIC30F6011/6012/6013/6014
3. Module: CPU
Sequential MAC class instructions, which prefetch
data from Y data space using +4 address
modification, will cause an address error trap. The
trap occurs only when all of the following
conditions are true:
1. Two sequential MAC class instructions (or a
2. Both instructions prefetch data from Y data
3. Neither of the instruction uses an accumulator
Work around
The problem described above can be avoided by
using any of the following methods:
1. Inserting any other instruction between the two
2. Adding an accumulator write back (a dummy
3. Do not use the + = 4 or - = 4 address
4. Do not prefetch data from Y data space.
Affected Silicon Revisions
A3
X
MAC class instruction executed in a REPEAT or
DO loop) that prefetch from Y data space.
space using the + = 4 or - = 4 address
modification.
write back.
MAC class instructions.
write back if needed) to either of the MAC class
instructions.
modification.
B1
X
B2
X
DS80456D-page 5