STM8L101F2P6 STMicroelectronics, STM8L101F2P6 Datasheet

MCU 8BIT 4K FLASH 20TSSOP

STM8L101F2P6

Manufacturer Part Number
STM8L101F2P6
Description
MCU 8BIT 4K FLASH 20TSSOP
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet

Specifications of STM8L101F2P6

Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Infrared, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
STM8L10x
Core
STM8
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STX-RLINK
Minimum Operating Temperature
- 40 C
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Features
October 2010
Main microcontroller features
– Supply voltage range 1.65 V to 3.6 V
– Low power consumption (Halt: 0.3 µA,
– STM8 Core with up to 16 CISC MIPS
– Temp. range: -40 to 85 °C and 125 °C
– Up to 8 Kbytes of Flash program including
– Error correction code (ECC)
– Flexible write and read protection modes
– In-application and in-circuit programming
– Data EEPROM capability
– 1.5 Kbytes of static RAM
– Internal 16 MHz RC with fast wakeup time
– Internal low consumption 38 kHz RC
Reset and supply management
– Ultralow power, ultrasafe power-on-reset
– Three low power modes: Wait, Active-halt,
Interrupt management
– Nested interrupt controller with software
– Up to 29 external interrupt sources
I/Os
– Up to 30 I/Os, all mappable on external
– I/Os with prog. input pull-ups, high
Memories
Clock management
Active-halt: 0.8 µA, Dynamic Run:
150 µA/MHz)
throughput
up to 2 Kbytes of data EEPROM
(typ. 4 µs)
driving both the IWDG and the AWU
/power down reset
Halt
priority control
interrupt vectors
sink/source capability and one LED driver
infrared output
8-bit ultralow power microcontroller with up to 8 Kbytes Flash,
multifunction timers, comparators, USART, SPI, I2C
Doc ID 15275 Rev 11
Table 1.
STM8L101xx
Peripherals
– Two 16-bit general purpose timers (TIM2
– One 8-bit timer (TIM4) with 7-bit prescaler
– Infrared remote control (IR)
– Independent watchdog
– Auto-wakeup unit
– Beeper timer with 1, 2 or 4 kHz frequencies
– SPI synchronous serial interface
– Fast I2C Multimaster/slave 400 kHz
– USART with fractional baud rate generator
– 2 comparators with 4 inputs each
Development support
– Hardware single wire interface module
– In-circuit emulation (ICE)
96-bit unique ID
Reference
UFQFPN28
and TIM3) with up and down counter and 2
channels (used as IC, OC, PWM)
(SWIM) for fast on-chip programming and
non intrusive debugging
UFQFPN32
Device summary
STM8L101F1, STM8L101F2,
STM8L101F3,
STM8L101G2, STM8L101G3
STM8L101K3
UFQFPN20
STM8L101xx
Part number
LQFP32
TSSOP20
www.st.com
1/81
1

Related parts for STM8L101F2P6

STM8L101F2P6 Summary of contents

Page 1

Kbytes Flash, multifunction timers, comparators, USART, SPI, I2C Features ■ Main microcontroller features – Supply voltage range 1. 3.6 V – Low power consumption (Halt: 0.3 µA, Active-halt: 0.8 µA, ...

Page 2

Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

STM8L101xx 9 Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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STM8L101xx List of figures Figure 1. STM8L101xx device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of figures Figure 47. STM8L101xx ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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STM8L101xx 1 Introduction This datasheet provides the STM8L101xx pinout, ordering information, mechanical and electrical device characteristics. For complete information on the STM8L101xx microcontroller memory, registers and peripherals, please refer to the STM8L reference manual. The STM8L101xx devices are members of ...

Page 8

Description family very easy, and simplified even more by the use of a common set of development tools. All STM8L low power products are based on the same architecture with the same memory mapping and a coherent pinout. Table 2. ...

Page 9

STM8L101xx 3 Product overview Figure 1. STM8L101xx device block diagram SWIM IR_TIM PA[6:0] PB[7:0] PC[6:0] PD[7:0] COMP1_CH[4:1] COMP_REF COMP2_CH[4:1] Legend: AWU: Auto-wakeup unit Int. RC: internal RC oscillator I²C: Inter-integrated circuit multimaster interface POR/PDR: Power on reset / power down ...

Page 10

Product overview 3.1 Central processing unit STM8 The 8-bit STM8 core is designed for code efficiency and performance. It features 21 internal registers, 20 addressing modes including indexed, indirect and relative addressing, and 80 instructions. 3.2 Development tools Development tools ...

Page 11

STM8L101xx 3.5 Memory The STM8L101xx devices have the following main features: ● 1.5 Kbytes of RAM ● The EEPROM is divided into two memory arrays (see the STM8L reference manual for details on the memory mapping): – ...

Page 12

Product overview 3.10 Auto-wakeup counter The auto-wakeup (AWU) counter is used to wakeup the device from Active-halt mode. 3.11 General purpose and basic timers STM8L101xx devices contain two 16-bit general purpose timers (TIM2 and TIM3) and one 8-bit basic timer ...

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STM8L101xx 3.15 USART The USART interface (USART) allows full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates. 3.16 SPI The serial peripheral interface (SPI) ...

Page 14

Pin description 4 Pin description Figure 2. Standard 20-pin UFQFPN package pinout 1. HS corresponds high sink/source capability. 2. High sink LED driver capability available on PA0. Refer to the description of the IR_CR register in the ...

Page 15

STM8L101xx Figure 3. 20-pin UFQFPN package pinout for STM8L101F1U6ATR, STM8L101F2U6ATR and STM8L101F3U6ATR part numbers PA6 (HS) / COMP_REF 1. Please refer to the warning below corresponds high sink/source capability. 3. High sink LED driver capability ...

Page 16

Pin description Figure 4. 20-pin TSSOP package pinout PC4 (HS) / USART_CK/ CCO PA0 (HS) / SWIM / BEEP / IR_TIM PD0 (HS) / TIM3_CH2 / COMP1_CH3 PB0 (HS) / TIM2_CH1 / COMP1_CH1 1. HS corresponds high ...

Page 17

STM8L101xx Figure 5. Standard 28-pin UFQFPN package pinout NRST / PA1 (HS) PA4 (HS) / TIM2_BKIN PA5 (HS) / TIM3_BKIN 1. HS corresponds high sink/source capability. 2. High sink LED driver capability available on PA0. Refer to ...

Page 18

Pin description Figure 6. 28-pin UFQFPN package pinout for STM8L101G3U6ATR and STM8L101G2U6ATR part numbers NRST / PA1 (HS) PA4 (HS) / TIM2_BKIN PA6 (HS) / COMP_REF 1. HS corresponds high sink/source capability. 2. High sink LED driver ...

Page 19

STM8L101xx Figure 7. 32-pin package pinout PA4 (HS) / TIM2_BKIN PA5 (HS) / TIM3_BKIN PA6 (HS) / COMP_REF 1. Example given for the UFQFPN32 package. The pinout is the same for the LQFP32 package corresponds ...

Page 20

Pin description Table 3. Legend/abbreviation for table 4 Type Level Port and control configuration Reset state Table 4. STM8L101xx pin description Pin number Pin name NRST/PA1 PA2 3 ...

Page 21

STM8L101xx Table 4. STM8L101xx pin description (continued) Pin number Pin name PB0/TIM2_CH1 COMP1_CH1 PB1/TIM3_CH1 COMP1_CH2 PB2/ TIM2_CH2 COMP2_CH1/ PB3/TIM2_TRIG ...

Page 22

Pin description Table 4. STM8L101xx pin description (continued) Pin number Pin name - - - PC6 (5) PA0 /SWIM BEEP/IR_TIM 1. Please refer to the warning below power-up, the ...

Page 23

STM8L101xx 5 Memory and register map Figure 8. Memory map 1. Table 5 lists the boundary addresses for each memory size. The top of the stack is at the RAM end address. 2. Refer to Table 7 for an overview ...

Page 24

Memory and register map Table 5. Flash and RAM boundary addresses Memory area RAM Flash program memory Table 6. I/O Port hardware register map Address Block 0x00 5000 0x00 5001 0x00 5002 Port A 0x00 5003 0x00 5004 0x00 5005 ...

Page 25

STM8L101xx Table 7. General hardware register map Address Block 0x00 5050 0x00 5051 0x00 5052 Flash 0x00 5053 0x00 5054 0x00 5055 to 0x00 509F 0x00 50A0 0x00 50A1 0x00 50A2 ITC-EXTI 0x00 50A3 0x00 50A4 0x00 50A5 0x00 50A6 ...

Page 26

Memory and register map Table 7. General hardware register map (continued) Address Block 0x00 50E0 0x00 50E1 IWDG 0x00 50E2 0x00 50E3 to 0x00 50EF 0x00 50F0 0x00 50F1 AWU 0x00 50F2 0x00 50F3 BEEP 0x00 50F4 to 0x00 51FF ...

Page 27

STM8L101xx Table 7. General hardware register map (continued) Address Block 0x00 521E to 0x00 522F 0x00 5230 0x00 5231 0x00 5232 0x00 5233 USART 0x00 5234 0x00 5235 0x00 5236 0x00 5237 0x00 5238 to 0x00 524F Register label Register ...

Page 28

Memory and register map Table 7. General hardware register map (continued) Address Block 0x00 5250 0x00 5251 0x00 5252 0x00 5253 0x00 5254 0x00 5255 0x00 5256 0x00 5257 0x00 5258 0x00 5259 0x00 525A TIM2 0x00 525B 0x00 525C ...

Page 29

STM8L101xx Table 7. General hardware register map (continued) Address Block 0x00 5280 0x00 5281 0x00 5282 0x00 5283 0x00 5284 0x00 5285 0x00 5286 0x00 5287 0x00 5288 0x00 5289 0x00 528A TIM3 0x00 528B 0x00 528C 0x00 528D 0x00 ...

Page 30

Memory and register map Table 7. General hardware register map (continued) Address Block 0x00 52E9 to 0x00 52FE 0x00 52FF IRTIM 0x00 5300 0x00 5301 COMP 0x00 5302 Table 8. CPU/SWIM/debug module/interrupt controller registers Address Block 0x00 7F00 0x00 7F01 ...

Page 31

STM8L101xx Table 8. CPU/SWIM/debug module/interrupt controller registers (continued) Address Block 0x00 7F78 to 0x00 7F79 0x00 7F80 SWIM 0x00 7F81 to 0x00 7F8F 0x00 7F90 0x00 7F91 0x00 7F92 0x00 7F93 0x00 7F94 0x00 7F95 0x00 7F96 0x00 7F97 0x00 ...

Page 32

Interrupt vector mapping 6 Interrupt vector mapping Table 9. Interrupt mapping IRQ Source Description No. block RESET Reset TRAP Software interrupt 0 Reserved 1 FLASH EOP/WR_PG_DIS 2-3 Reserved 4 AWU Auto wakeup from Halt 5 Reserved 6 EXTIB External interrupt ...

Page 33

STM8L101xx Table 9. Interrupt mapping (continued) IRQ Source Description No. block Transmission 27 USART complete/transmit data register empty Receive Register DATA 28 USART FULL/overrun/idle line detected/parity error (2) 29 I2C I2C interrupt 1. In WFE mode, this interrupt is served ...

Page 34

Option bytes 7 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated row of the memory. All option bytes can be modified only in ...

Page 35

STM8L101xx Table 11. Option byte description (continued) OPT3 OPT4 1. 0x00 is the only allowed value for 4 Kbyte STM8L101xx devices. Caution: After a device reset, read access to the program memory is not guaranteed if address 0x4807 is not ...

Page 36

Unique ID 8 Unique ID STM8L101xx devices feature a 96-bit unique device identifier which provides a reference number that is unique for any device and in any context. The 96 bits of the identifier can never be altered by the ...

Page 37

STM8L101xx 9 Electrical parameters 9.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 9.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage ...

Page 38

Electrical parameters 9.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 10. Pin input voltage 9.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage ...

Page 39

STM8L101xx Table 14. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by IR_TIM pin (with high sink LED driver capability Output current sunk by any other I/O ...

Page 40

Electrical parameters 9.3 Operating conditions Subject to general operating conditions for V 9.3.1 General operating conditions Table 16. General operating conditions Symbol Parameter (1) f Master clock frequency MASTER V Standard operating voltage DD Power dissipation at T for suffix ...

Page 41

STM8L101xx 9.3.2 Power-up / power-down operating conditions Table 17. Operating conditions at power-up / power-down Symbol t V VDD DD t Reset release delay TEMP Power on reset (1) V POR threshold Power down reset (1) V PDR threshold 1. ...

Page 42

Electrical parameters 9.3.3 Supply current characteristics Total current consumption The MCU is placed under the following conditions: ● All I/O pins in input mode with a static value at V ● All peripherals are disabled except if explicitly mentioned. Subject ...

Page 43

STM8L101xx Table 19. Total current consumption in Wait mode Symbol Parameter Supply I DD (Wait) current in Wait mode 1. Based on characterization results, unless otherwise specified. 2. Maximum values are given for T Figure 13. I vs. V DD(WAIT) ...

Page 44

Electrical parameters Table 20. Total current consumption and timing in Halt and Active-halt mode Symbol Supply current in Active-halt I DD(AH) mode Supply current during I wakeup time from Active-halt DD(WUFAH) mode Wakeup time from Active- (3) ...

Page 45

STM8L101xx Current consumption of on-chip peripherals Measurement made for f Table 21. Peripheral current consumption Symbol I TIM2 supply current DD(TIM2) I TIM3 supply current DD(TIM3) I TIM4 timer supply current DD(TIM4) I USART supply current DD(USART) I SPI supply ...

Page 46

Electrical parameters 9.3.4 Clock and timing characteristics Internal clock sources Subject to general operating conditions for V High speed internal RC oscillator (HSI) Table 22. HSI oscillator characteristics Symbol Parameter f Frequency HSI Accuracy of HSI ACC HSI oscillator (factory ...

Page 47

STM8L101xx Figure 17. Typical HSI accuracy vs. temperature, V 3.5% 3.0% 2.5% 2.0% 1.5% 1.0% 0.5% 0.0% -0.5% -1.0% -1.5% -2.0% -2.5% -3.0% -3.5% -4.0% -4.5% -5.0% Figure 18. Typical HSI accuracy vs. temperature, V 3.5% 3.0% 2.5% 2.0% 1.5% ...

Page 48

Electrical parameters Figure 19. Typical LSI RC frequency vs. V 48/ -40°C 31 25°C 29 85°C 27 125°C 25 1.6 2.1 2.6 V [V] DD Doc ID 15275 Rev 11 STM8L101xx 3.1 ...

Page 49

STM8L101xx 9.3.5 Memory characteristics T = -40 to 125 °C unless otherwise specified. A Table 24. RAM and hardware registers Symbol V Data retention mode RM 1. Minimum supply voltage without losing data stored in RAM (in Halt mode or ...

Page 50

Electrical parameters 9.3.6 I/O port pin characteristics General characteristics Subject to general operating conditions for V unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down ...

Page 51

STM8L101xx Figure 20. Typical V Figure 21. Typical V Figure 22. Typical pull-up resistance R and V vs. V (standard I/Os -40°C -40° 25°C 25°C 85°C 85°C 2.5 2.5 125°C 125° 1.5 1.5 ...

Page 52

Electrical parameters Figure 23. Typical pull-up current I 52/81 vs 120 -40°C 25°C 100 85°C 125° 1.65 1.8 1.95 2.1 2.25 2.4 2.55 2.7 2.85 V [V] DD Doc ID 15275 Rev 11 ...

Page 53

STM8L101xx Output driving current Subject to general operating conditions for V Table 27. Output driving current (standard ports) I/O Symbol Type Output low level voltage for an I/O pin ( (2) V Output high level voltage for an ...

Page 54

Electrical parameters Figure 24. Typ ports) 1.5 -40°C 1.25 25°C 1 85°C 125°C 0.75 0.5 0. [mA] OL Figure 26. Typ drain ports) 0.5 -40°C ...

Page 55

STM8L101xx NRST pin The NRST pin input driver is CMOS. A permanent pull-up is present. R has the same value as R PU(NRST) Subject to general operating conditions for V Table 30. NRST pin characteristics Symbol V NRST input low ...

Page 56

Electrical parameters Figure 31. Typical NRST pull-up current I The reset network shown in must ensure that the level on the NRST pin can go below the V Table 30. Otherwise the reset is not taken into account internally. For ...

Page 57

STM8L101xx 9.3.7 Communication interfaces Serial peripheral interface (SPI) Unless otherwise specified, the parameters given in performed under ambient temperature, f conditions summarized in the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 31. SPI characteristics Symbol Parameter f SCK ...

Page 58

Electrical parameters Figure 33. SPI timing diagram - slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure ...

Page 59

STM8L101xx Figure 35. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are done at CMOS levels: 0.3V (1) t ...

Page 60

Electrical parameters Inter IC control interface (I2C) Subject to general operating conditions for V 2 The STM8L I C interface meets the requirements of the Standard I protocol described in the following table with the restriction mentioned below: Refer to ...

Page 61

STM8L101xx Figure 36. Typical application with I2C bus and timing diagram BUS SDA t f(SDA) SCL t h(STA) 1. Measurement points are done at CMOS levels: 0 9.3.8 Comparator characteristics Table 33. Comparator characteristics Symbol ...

Page 62

Electrical parameters 9.3.9 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by ...

Page 63

STM8L101xx Electromagnetic interference (EMI) Based on a simple application running on the product (toggling 2 LEDs through the I/O ports), the product is monitored in terms of emission. This emission test is in line with the norm SAE J 1752/3 ...

Page 64

Electrical parameters Static latch-up ● LU: 2 complementary static tests are required on 10 parts to assess the latch-up performance. A supply overvoltage (applied to each power supply pin) and a current injection (applied to each input, output and configurable ...

Page 65

STM8L101xx Table 38. Thermal characteristics Symbol Thermal resistance junction-ambient LQFP Thermal resistance junction-ambient UFQFPN Thermal resistance junction-ambient JA UFQFPN Thermal resistance junction-ambient ...

Page 66

Package characteristics 10 Package characteristics 10.1 ECOPACK In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: ...

Page 67

STM8L101xx 10.2 Package mechanical data Figure 37. UFQFPN32 - 32-lead ultra thin fine pitch quad flat no-lead package outline (1)(2)( Seating plane Pin # ...

Page 68

Package characteristics Table 39. UFQFPN32 - 32-lead ultra thin fine pitch quad flat no-lead package (5 x 5), package mechanical data (continued) Dim. Min L 0.30 ddd N 1. Values in inches are converted from mm and rounded to 4 ...

Page 69

STM8L101xx Figure 39. LQFP32 - 32-pin low profile quad flat package outline ( Seating plane ccc Pin 1 identification 1 1. Drawing is not to scale. ...

Page 70

Package characteristics Figure 41. UFQFPN28 - 28-lead ultra thin fine pitch quad flat no-lead package outline ( Drawing is not to scale 2. Dimensions are in millimeters Table 41. ...

Page 71

STM8L101xx Figure 43. UFQFPN20 0.6 mm package (1) outline Drawing is not to scale 2. Dimensions are in millimeters Table 42. UFQFPN20 ...

Page 72

Package characteristics Figure 45. TSSOP20 - 20-lead thin shrink small package outline Drawing is not to scale 2. Dimensions are in millimeters Table 43. 20-lead thin shrink small package, mechanical data ...

Page 73

STM8L101xx 11 Device ordering information Figure 47. STM8L101xx ordering information scheme Example: Product class STM8 microcontroller Family type L = Low power Sub-family type 101 = sub-family Pin count pins pins ...

Page 74

... In addition, STM8 application development is supported by a low-cost in-circuit debugger/programmer. The STice is the fourth generation of full featured emulators from STMicroelectronics. It offers new advanced debugging capabilities including profiling and coverage to help detect and eliminate bottlenecks in application execution and dead code when fine tuning an application ...

Page 75

... Software tools STM8 development tools are supported by a complete, free software package from STMicroelectronics that includes ST Visual Develop (STVD) IDE and the ST Visual Programmer (STVP) software interface. STVD provides seamless integration of the Cosmic and Raisonance C compilers for STM8. A free version that outputs Kbytes of code is available ...

Page 76

Revision history 13 Revision history Table 44. Document revision history Date 19-Dec-2008 22-Apr-2009 24-Apr-2009 14-May-2009 15-May-2009 76/81 Revision 1 Initial release. Added TSSOP28 package Modified packages on first page COMPx_OUT pins removed Added Figure 6: 28-pin TSSOP package pinout on ...

Page 77

STM8L101xx Table 44. Document revision history (continued) Date 12-Jun-2009 Revision Removed TSSOP28 package Modified consumption value on first page Added BEEP_CSR (address 00 50F3h) in hardware register map on page 25 TIM2_PSCRL replaced with TIM2_PSCR and CLK_PCKEN replaced with CLK_PCKENR ...

Page 78

Revision history Table 44. Document revision history (continued) Date 07-Sep-2009 78/81 Revision Added STM8L101F2U6ATR, STM8L101G2U6ATR and STM8L101G3U6ATR part numbers Modified Section 2: Description on page Modified Table 2: Device features on page 8 Modified Figure 1: STM8L101xx device block diagram ...

Page 79

STM8L101xx Table 44. Document revision history (continued) Date 29-Nov-2009 18-Jun-2010 Revision Modified status of the document (datasheet instead of preliminary data) Replaced WFQFPN32 with UFQFPN32 and WFQFPN28 with UFQFPN28. Modified title of the reference manual mentioned in Description on page ...

Page 80

Revision history Table 44. Document revision history (continued) Date 21-Jul-2010 14-Oct-2010 80/81 Revision Modified Table 3: Legend/abbreviation for table 4 on page 20 Table 4: STM8L101xx pin description on page 20 and PB4) 10 Modified Table 13: Voltage characteristics on ...

Page 81

... STM8L101xx Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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