STM8L151K6T6 STMicroelectronics, STM8L151K6T6 Datasheet
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STM8L151K6T6
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STM8L151K6T6 Summary of contents
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MCU Flash Data EEPROM RTC, LCD, timers, USART, I2C, SPI, ADC, DAC, comparators Features ■ Operating conditions – Operating power supply range 1 3.6 V (down to 1.65 V ...
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Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8L151xx, STM8L152xx 3.16 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Contents 9.3.9 9.3.10 9.3.11 9.3.12 9.3.13 9.3.14 9.3.15 9.4 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8L151xx, STM8L152xx List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 48. Comparator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8L151xx, STM8L152xx List of figures Figure 1. Medium density STM8L15x device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 49. Recommended footprint (dimensions in mm) Figure 50. LQFP48 – 48-pin low profile quad flat package outline (7x7 ...
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... STM8L15x and STM8L16x reference manual (RM0031) and in the STM8L Flash programming manual (PM0054). For more details on the whole STMicroelectronics ultralow power family please refer to Section 2.2: Ultralow power continuum on page For information on the debug module and SWIM (single wire interface module), refer to the STM8 SWIM communication protocol and debug module user manual (UM0470) ...
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Description 2 Description The medium density STM8L15x devices are members of the STM8L Ultralow power 8-bit family. The medium density STM8L15x family operates from 1 3.6 V (down to 1. power down) and is available in ...
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STM8L151xx, STM8L152xx 2.1 Device overview Table 2. Medium density STM8L15x low power device features and peripheral counts Features Flash (Kbytes) Data EEPROM (Kbytes) RAM-Kbytes LCD Basic Timers General purpose Advanced control SPI Communication I2C interfaces USART GPIOs 12-bit synchronized ADC ...
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... STMicroelectronics microcontrollers UtraLowPower strategy which also includes STM8L101xx and STM32L15xxx. The STM8L and STM32L families allow a continuum of performance, peripherals, system architecture, and features. They are all based on STMicroelectronics 0.13 µm ultralow leakage process. Note: 1 The STM8L151xx and STM8L152xx are pin-to-pin compatible with STM8L101xx devices. ...
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STM8L151xx, STM8L152xx 3 Functional overview Figure 1. Medium density STM8L15x device block diagram OSC_IN, 1-16 MHz oscillator OSC_OUT 16 MHz internal RC OSC32_IN, 32 kHz oscillator OSC32_OUT 38 kHz internal RC Interrupt controller STM8 Core Debug module SWIM (SWIM) 2 ...
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Functional overview 3.1 Low power modes The medium density STM8L15x device supports five low power modes to achieve the best compromise between low power consumption, short startup time and available wakeup sources: ● Wait mode: CPU clock is stopped, but ...
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STM8L151xx, STM8L152xx Architecture and registers ● Harvard architecture ● 3-stage pipeline ● 32-bit wide program memory bus - single cycle fetching most instructions ● X and Y 16-bit index registers - enabling indexed addressing modes with or without offset and ...
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Functional overview 3.3 Reset and supply management 3.3.1 Power supply scheme The device requires a 1. 3.6 V operating supply voltage (V supply pins must be connected as follows: ● SS1 DD1 I/Os and for ...
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STM8L151xx, STM8L152xx 3.4 Clock management The clock controller distributes the system clock (SYSCLK) coming from different oscillators to the core and the peripherals. It also manages clock gating for low power modes and ensures clock robustness. Features ● Clock prescaler: ...
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Functional overview Figure 2. Medium density STM8L15x clock tree diagram 1. The HSE clock source can be either an external crystal/ceramic resonator or an external source (HSE bypass). Refer to Section HSE clock in the STM8L15x and STM8L16x reference manual ...
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STM8L151xx, STM8L152xx 3.6 LCD (Liquid crystal display) The liquid crystal display drives common terminals and segment terminals to drive up to 112 pixels. ● Internal step-up converter to guarantee contrast control whatever V ● ...
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Functional overview 3.10 Digital-to-analog converter (DAC) ● 12-bit DAC with output buffer ● Synchronized update capability using TIM4 ● DMA capability ● External triggers for conversion ● Input reference voltage V Note: DAC can be served by DMA1. 3.11 Ultralow ...
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STM8L151xx, STM8L152xx Table 3. Timer feature comparison Counter Counter Timer resolution type TIM1 16-bit up/down TIM2 TIM3 TIM4 8-bit up 3.13.1 TIM1 - 16-bit advanced control timer This is a high-end timer designed for a wide range of control applications. ...
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Functional overview 3.14 Watchdog timers The watchdog system is based on two independent timers providing maximum security to the applications. 3.14.1 Window watchdog timer The window watchdog (WWDG) is used to detect the occurrence of a software fault, usually generated ...
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STM8L151xx, STM8L152xx 3.16.3 USART The USART interface (USART1) allows full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates. ● 1 Mbit/s full duplex SCI ...
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Pin description 4 Pin description Figure 3. STM8L151Gx UFQFPN 28 package pinout Figure 4. STM8L151Gx WLCSP28 package pinout 24/122 NRST/PA1 1 21 PA2 20 2 PA3 19 3 PA4 18 4 PA5 17 ...
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STM8L151xx, STM8L152xx Figure 5. STM8L151Kx 32-pin package pinout (without LCD) 1. Example given for the UFQFPN32 package. The pinout is the same for the LQFP32 package. Figure 6. STM8L152Kx 32-pin package pinout (with LCD) 1. Example given for the UFQFPN32 ...
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Pin description Table 4. Legend/abbreviation for table 5 Type Level Port and control configuration Reset state Table 5. Medium density STM8L15x pin description Pin number Pin name ( NRST/PA1 PA2/OSC_IN/ ( [USART1_TX] ...
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STM8L151xx, STM8L152xx Table 5. Medium density STM8L15x pin description (continued) Pin number Pin name PA5/TIM3_BKIN/ ( LCD_COM1 /ADC1_IN1/ COMP1_INP PA5/TIM3_BKIN/ (4) [TIM3_ETR (2) LCD_COM1 /ADC1_IN1/ COMP1_INP PA6/[ADC1_TRIG] ( ...
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Pin description Table 5. Medium density STM8L15x pin description (continued) Pin number Pin name PB3/[TIM2_ETR] TIM1_CH2N/LCD_SEG13 - (2) /ADC1_IN15/ COMP1_INP PB3/[TIM2_ETR] TIM1_CH1N/ ( LCD_SEG13 / ADC1_IN15/RTC_ALARM /COMP1_INP (6) PB4 /[SPI1_NSS] ( ...
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STM8L151xx, STM8L152xx Table 5. Medium density STM8L15x pin description (continued) Pin number Pin name PB6/[SPI1_MOSI] (2) LCD_SEG16 / - ADC1_IN12/COMP1_INP/ DAC_OUT PB7/[SPI1_MISO] ( LCD_SEG17 / ADC1_IN11/COMP1_INP ( PC0 /I2C1_SDA ...
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Pin description Table 5. Medium density STM8L15x pin description (continued) Pin number Pin name PC6/OSC32_OUT/ ( [SPI1_SCK] / (4) [USART1_RX] PC7/LCD_SEG25 ADC1_IN3/COMP2_INM/ COMP1_INP PD0/TIM3_CH2/ (4) [ADC1_TRIG] ( LCD_SEG7 ...
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STM8L151xx, STM8L152xx Table 5. Medium density STM8L15x pin description (continued) Pin number Pin name PD2/TIM1_CH1 ( /LCD_SEG8 / ADC1_IN20/COMP1_INP PD3/ TIM1_ETR/ ( LCD_SEG9 /ADC1_IN1 9/COMP1_INP PD3/ TIM1_ETR/ (2) LCD_SEG9 / - - ...
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Pin description Table 5. Medium density STM8L15x pin description (continued) Pin number Pin name PE1/TIM1_CH2N (2) /LCD_SEG2 PE2/TIM1_CH3N (2) /LCD_SEG3 PE3/LCD_SEG4 PE4/LCD_SEG5 PE5/LCD_SEG6 19 ...
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STM8L151xx, STM8L152xx Table 5. Medium density STM8L15x pin description (continued) Pin number Pin name SS2 (9) PA0 /[USART1_CK SWIM/BEEP/IR_TIM 1. At power-up, the PA1/NRST pin is a reset input pin with ...
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Memory and register map 5 Memory and register map 5.1 Memory mapping The memory map is shown in Figure 9. Memory map 0x00 0000 Stack 0x00 07FF 0x00 0800 0x00 0FFF 0x00 1000 0x00 13FF 0x00 1400 0x00 47FF 0x00 ...
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STM8L151xx, STM8L152xx Table 6. Flash and RAM boundary addresses Memory area RAM Flash program memory 5.2 Register map Table 7. Factory conversion registers Address Block 0x00 4910 - 0x00 4911 - 1. The VREFINT_Factory_CONV byte represents the 8 LSB of ...
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Memory and register map Table 8. I/O port hardware register map (continued) Address Block 0x00 500F 0x00 5010 0x00 5011 Port D 0x00 5012 0x00 5013 0x00 5014 0x00 5015 0x00 5016 Port E 0x00 5017 0x00 5018 0x00 5019 ...
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STM8L151xx, STM8L152xx Table 9. General hardware register map (continued) Address Block 0x00 5070 0x00 5071 0x00 5072 to 0x00 5074 0x00 5075 0x00 5076 0x00 5077 0x00 5078 0x00 5079 0x00 507A DMA1 0x00 507B 0x00 507C 0x00 507D to ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5084 0x00 5085 0x00 5086 0x00 5087 0x00 5088 0x00 5089 0x00 508A 0x00 508B 0x00 508C 0x00 508D 0x00 508E 0x00 508F DMA1 0x00 5090 ...
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STM8L151xx, STM8L152xx Table 9. General hardware register map (continued) Address Block 0x00 50A0 0x00 50A1 0x00 50A2 ITC - EXTI 0x00 50A3 0x00 50A4 0x00 50A5 0x00 50A6 0x00 50A7 WFE 0x00 50A8 0x00 50A9 to 0x00 50AF 0x00 50B0 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 50D0 to 0x00 50D2 0x00 50D3 WWDG 0x00 50D4 0x00 50D5 to 00 50DF 0x00 50E0 0x00 50E1 IWDG 0x00 50E2 0x00 50E3 to 0x00 50EF ...
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STM8L151xx, STM8L152xx Table 9. General hardware register map (continued) Address Block 0x00 5140 0x00 5141 0x00 5142 0x00 5143 0x00 5144 0x00 5145 0x00 5146 0x00 5147 0x00 5148 0x00 5149 0x00 514A 0x00 514B 0x00 514C 0x00 514D 0x00 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5200 0x00 5201 0x00 5202 0x00 5203 SPI1 0x00 5204 0x00 5205 0x00 5206 0x00 5207 0x00 5208 to 0x00 520F 0x00 5210 0x00 5211 0x00 ...
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STM8L151xx, STM8L152xx Table 9. General hardware register map (continued) Address Block 0x00 5230 0x00 5231 0x00 5232 0x00 5233 0x00 5234 0x00 5235 USART1 0x00 5236 0x00 5237 0x00 5238 0x00 5239 0x00 523A 0x00 523B to 0x00 524F Register ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5250 0x00 5251 0x00 5252 0x00 5253 0x00 5254 0x00 5255 0x00 5256 0x00 5257 0x00 5258 0x00 5259 0x00 525A 0x00 525B TIM2 0x00 525C ...
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STM8L151xx, STM8L152xx Table 9. General hardware register map (continued) Address Block 0x00 5280 0x00 5281 0x00 5282 0x00 5283 0x00 5284 0x00 5285 0x00 5286 0x00 5287 0x00 5288 0x00 5289 0x00 528A 0x00 528B TIM3 0x00 528C 0x00 528D ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 52B0 0x00 52B1 0x00 52B2 0x00 52B3 0x00 52B4 0x00 52B5 0x00 52B6 0x00 52B7 0x00 52B8 0x00 52B9 0x00 52BA 0x00 52BB 0x00 52BC 0x00 ...
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STM8L151xx, STM8L152xx Table 9. General hardware register map (continued) Address Block 0x00 52D2 0x00 52D3 0x00 52D4 to 0x00 52DF 0x00 52E0 0x00 52E1 0x00 52E2 0x00 52E3 0x00 52E4 TIM4 0x00 52E5 0x00 52E6 0x00 52E7 0x00 52E8 0x00 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 534E 0x00 534F ADC1 0x00 5350 0x00 5351 0x00 5352 to 0x00 537F 0x00 5380 0x00 5381 0x00 5382 to 0x00 5383 0x00 5384 0x00 5385 ...
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STM8L151xx, STM8L152xx Table 9. General hardware register map (continued) Address Block 0x00 5400 0x00 5401 0x00 5402 0x00 5403 LCD 0x00 5404 0x00 5405 0x00 5406 0x00 5407 0x00 5408 to 0x00 540B 0x00 540C 0x00 540D 0x00 540E 0x00 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5430 0x00 5431 0x00 5432 0x00 5433 0x00 5434 0x00 5435 0x00 5436 0x00 5437 RI 0x00 5438 0x00 5439 0x00 543A 0x00 543B 0x00 543C ...
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STM8L151xx, STM8L152xx Table 10. CPU/SWIM/debug module/interrupt controller registers Address Block Register Label 0x00 7F00 0x00 7F01 0x00 7F02 0x00 7F03 0x00 7F04 (1) 0x00 7F05 CPU 0x00 7F06 0x00 7F07 0x00 7F08 0x00 7F09 0x00 7F0A 0x00 7F0B to 0x00 ...
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Memory and register map Table 10. CPU/SWIM/debug module/interrupt controller registers (continued) Address Block Register Label 0x00 7F90 DM_BK1RE 0x00 7F91 DM_BK1RH 0x00 7F92 DM_BK1RL 0x00 7F93 DM_BK2RE 0x00 7F94 DM_BK2RH 0x00 7F95 DM DM_BK2RL 0x00 7F96 0x00 7F97 0x00 7F98 ...
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STM8L151xx, STM8L152xx 6 Interrupt vector mapping Table 11. Interrupt mapping IRQ Source Description No. block RESET Reset TRAP Software interrupt 0 1 FLASH EOP/WR_PG_DIS 2 DMA1 0/1 DMA1 channels 0/1 3 DMA1 2/3 DMA1 channels 2/3 4 RTC RTC alarm ...
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Interrupt vector mapping Table 11. Interrupt mapping (continued) IRQ Source Description No. block 24 TIM1 Capture/Compare 25 TIM4 Update/overflow/trigger 26 SPI1 End of Transfer Transmission 27 USART 1 complete/transmit data register empty Receive Register Data 28 USART 1 full/overrun/idle line ...
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STM8L151xx, STM8L152xx 7 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated memory block. All option bytes can be modified in ICP mode (with ...
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Option bytes Table 13. Option byte description Option byte No. ROP[7:0] Memory readout protection (ROP) OPT0 0xAA: Disable readout protection (write access via SWIM protocol) Refer to Readout protection section in the STM8L15x and STM8L16x reference manual (RM0031). UBC[7:0] Size ...
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STM8L151xx, STM8L152xx Table 13. Option byte description (continued) Option byte No. BOR_ON: 0: Brownout reset off 1: Brownout reset on OPT5 BOR_TH[3:1]: Brownout reset thresholds. Refer to the value of BOR_TH bits. OPTBL[15:0]: This option is checked by the boot ...
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Unique ID 8 Unique ID devices feature a 96-bit unique device identifier which provides a reference number that is unique for any device and in any context. The 96 bits of the identifier can never be altered by the user. ...
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STM8L151xx, STM8L152xx 9 Electrical parameters 9.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 9.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...
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Electrical parameters 9.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 11. Pin input voltage 9.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage ...
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STM8L151xx, STM8L152xx Table 16. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by IR_TIM pin (with high sink LED driver capability Output current sunk by any other ...
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Electrical parameters 9.3 Operating conditions Subject to general operating conditions for V 9.3.1 General operating conditions Table 18. General operating conditions Symbol Parameter System clock (1) f SYSCLK frequency Standard operating V DD voltage Analog operating V DDA voltage Power ...
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STM8L151xx, STM8L152xx 9.3.2 Embedded reset and power control block characteristics Table 19. Embedded reset and power control block characteristics Symbol Parameter V rise time rate DD t VDD V fall time rate DD t Reset release delay TEMP V Power-down ...
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Electrical parameters Figure 12. POR/BOR thresholds Internal NRST 64/122 Operating power supply Vdd Doc ID 15962 Rev 6 STM8L151xx, STM8L152xx Vdd ...
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STM8L151xx, STM8L152xx 9.3.3 Supply current characteristics Total current consumption The MCU is placed under the following conditions: ● All I/O pins in input mode with a static value at V ● All peripherals are disabled except if explicitly mentioned. In ...
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Electrical parameters Table 20. Total current consumption in Run mode (continued) Para Symbol meter All peripherals OFF, code Supply executed current I DD(RUN) from Flash, in Run V from mode All peripherals OFF, ...
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STM8L151xx, STM8L152xx Figure 13. Typ Typical current consumption measured with code executed from RAM vs MHz DD(RUN) DD CPU Doc ID 15962 Rev 6 Electrical parameters 67/122 ...
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Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 21. Total current consumption in Wait mode Symbol Parameter CPU not clocked, all peripherals OFF, Supply code executed I current in from RAM DD(Wait) ...
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STM8L151xx, STM8L152xx 1. All peripherals OFF, V from 1. 3.6 V, HSI internal RC osc For temperature range 6. 3. For temperature range 7. 4. For temperature range 3. 5. Flash is configured in ...
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Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 22. Total current consumption and timing in Low power run mode at V 3.6 V Symbol Parameter Supply current in Low I DD(LPR) power ...
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STM8L151xx, STM8L152xx Figure 15. Typ. I vs. V (LSI clock source) DD(LPR) DD Doc ID 15962 Rev 6 Electrical parameters 71/122 ...
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Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 23. Total current consumption in Low power wait mode at V Symbol Parameter Supply current in I DD(LPW) Low power wait mode 1. No ...
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STM8L151xx, STM8L152xx In the following table, data are based on characterization results, unless otherwise specified. Table 24. Total current consumption and timing in Active-halt mode at V Symbol Parameter Supply current in I DD(AH) Active-halt mode (1) Conditions T = ...
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Electrical parameters Table 24. Total current consumption and timing in Active-halt mode at V Symbol Parameter Supply current in I DD(AH) Active-halt mode Supply current during wakeup time from I DD(WUFAH) Active-halt mode (using HSI) Wakeup time from (8)(9) Active-halt ...
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STM8L151xx, STM8L152xx Table 25. Typical current consumption in Active-halt mode, RTC clocked by LSE external crystal Symbol Supply current in Active-halt (2) I DD(AH) mode 1. No floating I/O, unless otherwise specified. 2. Based on measurements on bench with 32.768 ...
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Electrical parameters Current consumption of on-chip peripherals Table 27. Peripheral current consumption Symbol I TIM1 supply current DD(TIM1) I TIM2 supply current DD(TIM2) I TIM3 supply current DD(TIM3) I TIM4 timer supply current DD(TIM4) I USART1 supply current DD(USART1) I ...
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STM8L151xx, STM8L152xx Table 28. Current consumption under external reset Symbol Parameter Supply current under I DD(RST) (1) external reset 1. All pins except PA0, PB0 and PB4 are floating under reset. PA0, PB0 and PB4 are configured with pull-up under ...
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Electrical parameters HSE crystal/ceramic resonator oscillator The HSE clock can be supplied with MHz crystal/ceramic resonator oscillator. All the information given in this paragraph is based on characterization results with specified typical external components. In the ...
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STM8L151xx, STM8L152xx LSE crystal/ceramic resonator oscillator The LSE clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph is based on characterization results with specified typical external components. In the application, the ...
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Electrical parameters Internal clock sources Subject to general operating conditions for V High speed internal RC oscillator (HSI) In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 33. HSI oscillator characteristics ...
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STM8L151xx, STM8L152xx Low speed internal RC oscillator (LSI) In the following table, data are based on characterization results, not tested in production. Table 34. LSI oscillator characteristics Symbol f Frequency LSI t LSI oscillator wakeup time su(LSI) LSI oscillator frequency ...
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Electrical parameters 9.3.5 Memory characteristics T = -40 to 125 °C unless otherwise specified. A Table 35. RAM and hardware registers Symbol V Data retention mode RM 1. Minimum supply voltage without losing data stored in RAM (in Halt mode ...
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STM8L151xx, STM8L152xx 9.3.6 I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below V above V (for standard pins) should be avoided during normal product operation. However order to ...
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Electrical parameters Table 38. I/O static characteristics Symbol Parameter V Input high level voltage IH Schmitt trigger voltage V hys (3) hysteresis I Input leakage current lkg Weak pull-up equivalent R PU (2)(6) resistor C I/O pin capacitance IO 1. ...
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STM8L151xx, STM8L152xx Figure 21. Typical V Figure 22. Typical V and (high sink I/Os and (true open drain I/Os Doc ID 15962 Rev 6 Electrical parameters 85/122 ...
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Electrical parameters Figure 23. Typical pull-up resistance R Figure 24. Typical pull-up current I 86/122 vs V with with Doc ID 15962 Rev 6 STM8L151xx, STM8L152xx =V SS ...
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STM8L151xx, STM8L152xx Output driving current Subject to general operating conditions for V Table 39. Output driving current (high sink ports) I/O Symbol Type (1) Output low level voltage for an I/O pin V OL (2) V Output high level voltage ...
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Electrical parameters Figure 25. Typ ports) Figure 27. Typ drain ports) Figure 29. Typ sink ports) NRST pin Subject to general operating conditions ...
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STM8L151xx, STM8L152xx Table 42. NRST pin characteristics Symbol Parameter V NRST input low level voltage IL(NRST) V NRST input high level voltage IH(NRST) V NRST output low level voltage OL(NRST) V NRST input hysteresis HYST NRST pull-up equivalent resistor R ...
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Electrical parameters Figure 32. Typical NRST pull-up current I The reset network shown in must ensure that the level on the NRST pin can go below the V Table 42. Otherwise the reset is not taken into account internally. Figure ...
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STM8L151xx, STM8L152xx 9.3.8 Communication interfaces SPI1 - Serial peripheral interface Unless otherwise specified, the parameters given in performed under ambient temperature, f conditions summarized in the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 43. SPI1 characteristics Symbol Parameter ...
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Electrical parameters Figure 34. SPI1 timing diagram - slave mode and CPHA=0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure 35. SPI1 ...
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STM8L151xx, STM8L152xx Figure 36. SPI1 timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are done at CMOS levels: 0.3V (1) ...
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Electrical parameters Inter IC control interface Subject to general operating conditions for V 2 The STM8L I C interface (I2C1) meets the requirements of the Standard I protocol described in the following table with the restriction ...
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STM8L151xx, STM8L152xx Figure 37. Typical application with BUS SDA t f(SDA) SCL t h(STA) 1. Measurement points are done at CMOS levels: 0 bus and timing diagram 4.7kΩ ...
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Electrical parameters 9.3.9 LCD controller (STM8L152xx only) In the following table, data are guaranteed by design. Not tested in production. Table 45. LCD characteristics Symbol V LCD V LCD0 V LCD1 V LCD2 V LCD3 V LCD4 V LCD5 V ...
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STM8L151xx, STM8L152xx 9.3.10 Embedded reference voltage In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 46. Reference voltage characteristics Symbol Parameter Internal reference voltage I REFINT consumption ADC sampling time when ...
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Electrical parameters 9.3.11 Temperature sensor In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 47. TS characteristics Symbol (1) V Sensor reference voltage at 90°C ±5 ° ...
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STM8L151xx, STM8L152xx In the following table, data are guaranteed by design, not tested in production. Table 49. Comparator 2 characteristics Symbol V Analog supply voltage DDA T Temperature range A V Comparator input voltage range IN Startup time after enable ...
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Electrical parameters 9.3.13 12-bit DAC characteristics In the following table, data are guaranteed by design, not tested in production. Table 50. DAC characteristics Symbol Parameter V Analog supply voltage DDA V Reference supply voltage REF+ Current consumption onV I VREF ...
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STM8L151xx, STM8L152xx In the following table, data based on characterization results, not tested in production. Table 51. DAC accuracy Symbol Parameter DNL Differential non linearity INL Integral non linearity (4) Offset Offset error Offset1 Offset error at Code 1 (6) ...
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Electrical parameters 9.3.14 12-bit ADC1 characteristics In the following table, data are guaranteed by design, not tested in production. Table 53. ADC1 characteristics Symbol Parameter V Analog supply voltage DDA Reference supply V REF+ voltage V Lower reference voltage REF- ...
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STM8L151xx, STM8L152xx Table 53. ADC1 characteristics (continued) Symbol Parameter t Sampling time S t 12-bit conversion time conv Wakeup time from OFF t WKUP state Time before a new (6) t IDLE conversion Internal reference t VREFINT voltage startup time ...
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Electrical parameters In the following three tables, data are guaranteed by characterization result, not tested in production. Table 54. ADC1 accuracy with V Symbol DNL Differential non linearity INL Integral non linearity TUE Total unadjusted error Offset Offset error Gain ...
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STM8L151xx, STM8L152xx Figure 38. ADC1 accuracy characteristics [1LSB = IDEAL 4095 4094 4093 SSA Figure 39. Typical connection diagram using the ADC 1. Refer to Table 53 ...
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Electrical parameters Figure 40. Power supply and reference decoupling (V Figure 41. Power supply and reference decoupling (V 106/122 1 µ µ µ Doc ID 15962 Rev 6 STM8L151xx, ...
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STM8L151xx, STM8L152xx 9.3.15 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by ...
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Electrical parameters Table 58. EMI data Symbol Parameter S Peak level EMI 1. Not tested in production. Absolute maximum ratings (electrical sensitivity) Based on two different tests (ESD and LU) using specific measurement methods, the product is stressed in order ...
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STM8L151xx, STM8L152xx 9.4 Thermal characteristics The maximum chip junction temperature (T Table 18: General operating conditions on page The maximum chip-junction temperature, T the following equation: Where: is the maximum ambient temperature in °C ● T Amax Θ is the ...
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Package characteristics 10 Package characteristics 10.1 ECOPACK In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: ...
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STM8L151xx, STM8L152xx Table 62. UFQFPN28 – 28-lead ultra thin fine pitch quad flat no-lead package (4 x 4), package mechanical data Dim. Min A 0.500 3.900 E 3.900 L 0.300 L1 0.250 T b 0.200 e N ...
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Package characteristics Figure 44. WLCSP28 – 28-pin wafer level chip scale package, package outline Table 63. WLCSP28 – 28-pin wafer level chip scale package, package mechanical data Dim. Min A 0.440 A1 0.165 A2 0.375 b 0.265 D 1.677 E ...
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STM8L151xx, STM8L152xx Table 63. WLCSP28 – 28-pin wafer level chip scale package, package mechanical data (continued) Dim. Min F 0.239 G 0.208 eee N 1. Values in inches are converted from mm and rounded to 4 decimal digits. mm Typ ...
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Package characteristics Figure 45. UFQFPN32 - 32-lead ultra thin fine pitch quad flat no-lead package outline (1)(2)( Seating plane Pin # 0.30 D2 ...
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STM8L151xx, STM8L152xx Figure 47. LQFP32 – 32-pin low profile quad flat package outline Pin 1 identification Table 65. LQFP32 – 32-pin low profile quad flat package, package mechanical data Dim. Min A A1 0.05 A2 1.35 b ...
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Package characteristics Figure 48. UFQFPN48 mm, 0.5 mm pitch, package (1)(2)(3) outline 1. Drawing is not to scale. 2. All leads/pads should also be soldered to the PCB to improve the lead/pad solder joint life. 3. There ...
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STM8L151xx, STM8L152xx Figure 50. LQFP48 – 48-pin low profile quad flat package outline (7x7 Pin 1 identification Table 67. LQFP48 – 48-pin low profile quad flat package (7x7), package mechanical data Dim. Min A A1 0.05 A2 ...
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Device ordering information 11 Device ordering information Figure 51. Medium density STM8L15x ordering information scheme Example: Product class STM8 microcontroller Family type L = Low power Sub-family type 151 = Ultralow power 152 = Ultralow power with LCD Pin count ...
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STM8L151xx, STM8L152xx 12 Revision history Table 68. Document revision history Date Revision 06-Aug-2009 10-Sep-2009 11-Dec-2009 02-Apr-2010 1 Initial release Updated peripheral naming throughout document. Added Figure 7: STM8L151Cx 48-pin pinout (without LCD) on page 25 Added capacitive sensing channels in ...
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Revision history Table 68. Document revision history Date Revision 23-Jul-2010 120/122 Modified Introduction and Modified Table 4: Legend/abbreviation for table 5 on page 26 Table 5: Medium density STM8L15x pin description on page 26 PA0, PA1, PB0 and PB4 and ...
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STM8L151xx, STM8L152xx Table 68. Document revision history Date Revision 11-Mar-2011 Modified note on true open drain I/Os and I/O level columns in Medium density STM8L15x pin description on page Remapping option removed for USART1_TX, USART1_RX, and USART1_CK on PC2, PC3 ...
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