Z8F0422SJ020EG Zilog, Z8F0422SJ020EG Datasheet - Page 65

• Manufacturer Part Number: Z8F0422SJ020EG
• Description: IC ENCORE MCU FLASH 4K 28SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0422SJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: Z8F042xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4142; Z8F0422SJ020EG

Table 17. Port A–CA–C Alternate Function Sub-Registers
Table 18. Port A–C Output Control Sub-Registers
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Caution:
7
7
POC7
AF7
If 02H in Port A–C Address Register, accessible through the Port A–C Control Register
If 03H in Port A–C Address Register, accessible through the Port A–C Control Register
pins.To determine the alternate function associated with each port pin, see
Block Diagram
AF[7:0]—Port Alternate Function enabled
0 = The port pin is in NORMAL mode and the DDx bit in the Port A–C Data
1 = The alternate function is selected. Port pin operation is controlled by the
Port A–C Output Control Sub-Registers
The Port A–C Output Control sub-register
Control Register by writing
Port A–C Output Control sub-registers to 1 configures the specified port pins for
open-drain operation. These sub-registers affect the pins directly and, as a result,
alternate functions are also affected.
POC[7:0]—Port Output Control
These bits function independently of the alternate function bit and always disable the
drains if set to 1.
0 = The drains are enabled for any output mode (unless overridden by the
Do not enable alternate function for GPIO port pins which do not have an associated
alternate function. Failure to follow this guideline can result in unpredictable operation.
Direction sub-register determines the direction of the pin.
alternate function.
6
6
POC6
AF6
on page 48.
5
5
POC5
AF5
03H
4
4
to the Port A–C Address Register. Setting the bits in the
POC4
AF4
R/W
R/W
0
0
3
(Table
3
POC3
AF3
18) is accessed through the Port A–C
2
2
Z8 Encore! XP
POC2
AF2
General-Purpose Input/Output
Product Specification
1
1
POC1
AF1
®
GPIO Port Pin
F0822 Series
0
0
POC0
AF0
52