Z8F0822PJ020EG Zilog, Z8F0822PJ020EG Datasheet - Page 162

• Manufacturer Part Number: Z8F0822PJ020EG
• Description: IC ENCORE MCU FLASH 8K 28DIP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0822PJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Processor Series: Z8F082xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4207; Z8F0822PJ020EG

PS022517-0508
Caution:
Follow the steps below for setting up the ADC and initiating continuous conversion:
1. Enable the desired analog input by configuring the GPIO pins for alternate function.
2. Write to the ADC Control Register to configure the ADC for continuous conversion.
3. When the first conversion in continuous operation is complete (after 5129 system
4. Thereafter, the ADC writes a new 10-bit data result to {ADCD_H[7:0],
5. To disable continuous conversion, clear the
This disables the digital input and output driver.
The bit fields in the ADC Control Register can be written simultaneously:
–
–
–
–
clock cycles, plus the 40 cycles for power-up, if necessary), the ADC control logic
performs the following operations:
–
–
ADCD_L[7:6]} every 256 system clock cycles. An interrupt request is sent to the
Interrupt Controller when each conversion is complete.
to 0.
In CONTINUOUS mode, ensure that ADC updates are limited by the input
signal bandwidth of the ADC and the latency of the ADC and its digital fil-
ter. Step changes at the input are not seen at the next output from the ADC.
The response of the ADC (in all modes) is limited by the input signal band-
width and the latency.
Write to the ANAIN[3:0] field to select one of the 5 analog input sources.
Set CONT to 1 to select continuous conversion.
Write to the VREF bit to enable or disable the internal voltage reference generator.
Set CEN to 1 to start the conversions.
CEN resets to 0 to indicate the first conversion is complete. CEN remains 0 for all
subsequent conversions in continuous operation.
An interrupt request is sent to the Interrupt Controller to indicate the conversion is
complete.
CONT
bit in the ADC Control Register
Z8 Encore! XP
Product Specification
Analog-to-Digital Converter
®
F0822 Series
149