W77E058A40PL Nuvoton Technology Corporation of America, W77E058A40PL Datasheet - Page 18

• Manufacturer Part Number: W77E058A40PL
• Description: IC MCU 8-BIT 32K FLASH 44-PLCC
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W77r

Specifications of W77E058A40PL

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, Serial Port
• Peripherals: POR, WDT
• Number Of I /o: 36
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Cpu Family: W77
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: UART
• Total Internal Ram Size: 1KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Serial Port Control
SM0/FE: Serial port 0, Mode 0 bit or Framing Error Flag: The SMOD0 bit in PCON SFR determines
SM1:
SM2:
REN:
TB8:
RB8:
TI:
RI:
Serial Data Buffer
SBUF.7-0: Serial data on the serial port 0 is read from or written to this location. It actually consists of
Multiple processors communication. Setting this bit to 1 enables the multiprocessor
communication feature in mode 2 and 3. In mode 2 or 3, if SM2 is set to 1, then RI will not be
activated if the received 9th data bit (RB8) is 0. In mode 1, if SM2 = 1, then RI will not be
activated if a valid stop bit was not received. In mode 0, the SM2 bit controls the serial port
clock. If set to 0, then the serial port runs at a divide by 12 clock of the oscillator. This gives
compatibility with the standard 8052. When set to 1, the serial clock become divide by 4 of the
oscillator clock. This results in faster synchronous serial communication.
Receive enable: When set to 1 serial reception is enabled, otherwise reception is disabled.
This is the 9th bit to be transmitted in modes 2 and 3. This bit is set and cleared by software
as desired.
In modes 2 and 3 this is the received 9th data bit. In mode 1, if SM2 = 0, RB8 is the stop bit
that was received. In mode 0 it has no function.
Transmit interrupt flag: This flag is set by hardware at the end of the 8th bit time in mode 0, or
at the beginning of the stop bit in all other modes during serial transmission. This bit must be
cleared by software.
Receive interrupt flag: This flag is set by hardware at the end of the 8th bit time in mode 0, or
halfway through the stop bits time in the other modes during serial reception. However the
restrictions of SM2 apply to this bit. This bit can be cleared only by software.
Serial port Mode bit 1:
whether this bit acts as SM0 or as FE. The operation of SM0 is described below. When used
as FE, this bit will be set to indicate an invalid stop bit. This bit must be manually cleared in
software to clear the FE condition.
two separate internal 8-bit registers. One is the receive resister, and the other is the
transmit buffer. Any read access gets data from the receive data buffer, while write access
is to the transmit data buffer.
SM0
Mnemonic: SCON
0
0
1
1
Mnemonic: SBUF
Bit:
Bit:
SM1
0
1
0
1
SM0/FE
SBUF.7 SBUF.6 SBUF.5 SBUF.4 SBUF.3 SBUF.2 SBUF.1 SBUF.0
7
7
Mode
0
1
2
3
SM1
6
6
Description
Synchronous
Asynchronous
Asynchronous
Asynchronous
SM2
- 18 -
5
5
Length
REN
10
11
11
4
8
4
TB8
3
3
Address: 98h
Baud rate
4/12 Tclk
Variable
64/32 Tclk
Variable
Address: 99h
RB8
2
2
W77E058A
TI
1
1
RI
0
0