F272-BAGE-T-TR STMicroelectronics, F272-BAGE-T-TR Datasheet - Page 46

• Manufacturer Part Number: F272-BAGE-T-TR
• Description: MCU 16BIT 256K FLASH 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of F272-BAGE-T-TR

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-TQFP, 144-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 20 KB
• Interface Type: ASC, CAN, I2C, SSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Bootstrap loader
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6.1
6.2
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Bootstrap loader
ST10F272 implements Boot capabilities in order to:
●
●
Selection among user-code, standard or selective bootstrap
The boot modes are triggered with a special combination set on Port0L[5...4]. Those
signals, as other configuration signals, are latched on the rising edge of RSTIN pin.
●
●
●
Table 25.
Standard bootstrap loader
After entering the standard BSL mode and the respective initialization, the ST10F272 scans
the RxD0 line and the CAN1_RxD line to receive either a valid dominant bit from CAN
interface, or a start condition from UART line.
Start condition on UART RxD: ST10F272 starts standard bootstrap loader. This bootstrap
loader is identical to other ST10 devices (example: ST10F269, ST10F168).
Valid dominant bit on CAN1 RxD: ST10F272 start bootstrapping via CAN1.
.
P0.5
1
1
0
0
Support bootstrap via UART or bootstrap via CAN for the standard bootstrap.
Support a Selective Bootstrap Loader, to manage the bootstrap sequence in a different
way.
Decoding of reset configuration (P0L.5 = 1, P0L.4 = 1) will select the normal mode
(also called User Mode) and select the user Flash to be mapped from address
00’0000h.
Decoding of reset configuration (P0L.5 = 1, P0L.4 = 0) will select ST10 standard
bootstrap mode (Test-Flash is active and overlaps user Flash for code fetches from
address 00'0000h; user Flash is active and available for read accesses).
Decoding of reset configuration (P0L.5 = 0, P0L.4 = 1) will activate new verifications to
select which bootstrap software to execute:
–
–
if the User mode signature in the User Flash is programmed correctly, then a
software reset sequence is selected and the User code is executed;
if the User mode signature is not programmed correctly in the user Flash, then the
User key location is read again. Its value will determine which communication
channel will be enabled for bootstraping
P0.4
ST10F272 boot mode selection
1
0
1
0
User Mode: user Flash mapped at 00’0000h
Standard Bootstrap Loader: User Flash mapped from 00’0000h, code fetches
redirected to Test-Flash at 00’0000h
Selective Boot Mode: User Flash mapped from 00’0000h, code fetches
redirected to Test-Flash at 00’0000h (different sequence execution in respect of
Standard Bootstrap Loader)
Reserved
ST10 decoding
ST10F272B/ST10F272E