STM32F103VEH6 STMicroelectronics, STM32F103VEH6 Datasheet - Page 17
STM32F103VEH6
Manufacturer Part Number
STM32F103VEH6
Description
MCU ARM 32BIT 512KB FLASH 100BGA
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F103VCT6.pdf
(123 pages)
Specifications of STM32F103VEH6
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFBGA
Processor Series
STM32F103x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN/I2C/SPI/USART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
80
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
3 (16-ch x 12-bit)
On-chip Dac
2 (2-ch x 12-bit)
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-9036
STM32F103VEH6
STM32F103VEH6
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Quantity
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STM32F103xC, STM32F103xD, STM32F103xE
2.3.10
2.3.11
2.3.12
2.3.13
Boot modes
At startup, boot pins are used to select one of three boot options:
●
●
●
The boot loader is located in System Memory. It is used to reprogram the Flash memory by
using USART1.
Power supply schemes
●
●
●
For more details on how to connect power pins, refer to
Power supply supervisor
The device has an integrated power-on reset (POR)/power-down reset (PDR) circuitry. It is
always active, and ensures proper operation starting from/down to 2 V. The device remains
in reset mode when V
external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
generated when V
than the V
message and/or put the MCU into a safe state. The PVD is enabled by software. Refer to
Table 12: Embedded reset and power control block characteristics
V
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
●
●
●
This regulator is always enabled after reset. It is disabled in Standby mode.
DD
POR/PDR
/V
Boot from User Flash
Boot from System Memory
Boot from embedded SRAM
V
Provided externally through V
V
and PLL (minimum voltage to be applied to V
and V
V
registers (through power switch) when V
MR is used in the nominal regulation mode (Run)
LPR is used in the Stop modes.
Power down is used in Standby mode: the regulator output is in high impedance: the
kernel circuitry is powered down, inducing zero consumption (but the contents of the
registers and SRAM are lost)
DD
SSA
BAT
DDA
= 2.0 to 3.6 V: external power supply for I/Os and the internal regulator.
, V
= 1.8 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup
PVD
and V
power supply and compares it to the V
SSA
DDA
threshold. The interrupt service routine can then generate a warning
must be connected to V
PVD
= 2.0 to 3.6 V: external analog power supplies for ADC, Reset blocks, RCs
DD
.
/V
DD
DDA
is below a specified threshold, V
drops below the V
Doc ID 14611 Rev 7
DD
pins.
DD
and V
DD
PVD
SS
is not present.
PVD
threshold and/or when V
DDA
, respectively.
threshold. An interrupt can be
is 2.4 V when the ADC is used). V
Figure 12: Power supply
POR/PDR
, without the need for an
for the values of
DD
/V
DDA
Description
scheme.
is higher
17/123
DDA