ST10F272M-4QR3 STMicroelectronics, ST10F272M-4QR3 Datasheet - Page 37

• Manufacturer Part Number: ST10F272M-4QR3
• Description: MCU 16BIT 256K FLASH 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F272M-4QR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F272M
5.5.5
5.5.6
Table 21.
Flash non-volatile access protection register 1 high (FNVAPR1H)
FNVAPR1H (0x08 DFBE)
PEN15PEN14PEN13PEN12PEN11PEN10 PEN9 PEN8 PEN7 PEN6 PEN5 PEN4 PEN3 PEN2 PEN1 PEN0
Table 22.
X-bus Flash volatile temporary access unprotection register
(XFVTAUR0)
XFVTAUR0 (0x00 EB50)
Table 23.
15:0 PDS[15:0]
15:0 PEN[15:0]
RW
Bit
Bit
Bit
15
15
0
RW
14
14
Name
Name
Name
TAUB
RW
Flash non-volatile access protection register 1 low
Flash non-volatile access protection register 1 high
X-bus Flash volatile temporary access unprotection register
13
13
Temporary access unprotection bit
If this bit is set to 1, the access protection is temporary disabled. The fact that this
bit can be written only while executing from IFlash guarantees that only a code
executed in IFlash can unprotect the IFlash when it is access protected.
Protections disable 15-0
If bit PDSx is programmed at 0 and bit PENx is erased at 1, the action of bit ACCP
is disabled. Bit PDS0 can be programmed at 0 only if both bits DBGP and ACCP
have already been programmed at 0. Bit PDSx can be programmed at 0 only if bit
PENx-1 has already been programmed at 0.
Protections enable 15-0
If bit PENx is programmed at 0 and bit PDSx+1 is erased at 1, the action of bit
ACCP is enabled again. Bit PENx can be programmed at 0 only if bit PDSx has
already been programmed at 0.
RW
12
12
RW
11
11
RW
10
10
RW
9
9
Reserved
NVR
NVR
RW
8
8
-
RW
7
7
Function
Function
Function
RW
6
6
RW
5
5
RW
4
4
Internal Flash memory
RW
3
3
Delivery value: FFFFh
Reset value: 0000h
RW
2
2
RW
1
1
37/176
TAUB
RW
RW
0
0