MC9S08FL8CBM Freescale Semiconductor, MC9S08FL8CBM Datasheet - Page 22

• Manufacturer Part Number: MC9S08FL8CBM
• Description: MCU 8BIT 8K FLASH 32-SDIP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08FL8CBM

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SCI
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SDIP (0.400", 10.16mm)
• Processor Series: S08FL
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08FL16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 8-bit
• Controller Family/series: HCS08
• No. Of I/o's: 30
• Ram Memory Size: 768Byte
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Characteristics
5.9.1
22
1
2
3
4
5
Num
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset pin request.
To enter BDM mode following a POR, BKGD/MS must be held low during the power-up and for a hold time of t
rises above V
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized.
Timing is shown with respect to 20% V
1
2
3
4
5
6
8
7
9
C
D
D
D
D
D
D
D
D
C
Control Timing
Bus frequency (t
Internal low power oscillator period
External reset pulse width
Reset low drive
BKGD/MS setup time after issuing background debug
force reset to enter user or BDM modes
BKGD/MS hold time after issuing background debug
force reset to enter user or BDM modes
IRQ pulse width
Keyboard interrupt pulse width
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
Asynchronous path
Synchronous path
Asynchronous path
Synchronous path
LVD
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
Slew rate control enabled (PTxSE = 1)
Slew rate control disabled (PTxSE = 0)
.
RESET PIN
cyc
= 1/f
4
4
2
2
Rating
Bus
2
DD
)
MC9S08FL16 Series Data Sheet, Rev. 3
and 80% V
Table 10. Control Timing
Figure 12. Reset Timing
3
DD
DD
5
levels. Temperature range –40 C to 85 C.
5
= 5.0 V, 25 C unless otherwise stated.
t
extrst
t
t
t
t
Symbol
ILIH,
ILIH,
Rise
Rise
t
t
t
MSSU
t
t
rstdrv
f
extrst
MSH
LPO
Bus
, t
, t
t
t
IHIL
IHIL
Fall
Fall
1.5  t
1.5  t
34  t
Min
700
100
500
100
100
100
dc
—
—
—
—
cyc
cyc
cyc
Typical
16
23
—
—
—
—
—
—
—
—
—
—
5
9
Freescale Semiconductor
1
1300
Max
10
—
—
—
—
—
—
—
—
—
—
—
—
MSH
after V
Unit
MHz
s
ns
ns
ns
s
ns
ns
ns
ns
DD